[PATCH] drm: lcdif: Use adjusted_mode .clock instead of .crtc_clock

[Marek Vasut]

On 10/10/24 7:31 AM, Liu Ying wrote:

Hi,

>> This Video PLL1 configuration since moved to &media_blk_ctrl {} , but it is still in the imx8mp.dtsi . Therefore, to make your panel work at the correct desired pixel clock frequency instead of some random one inherited from imx8mp.dtsi, add the following to the pollux DT, I believe that will fix the problem and is the correct fix:
>>
>> &media_blk_ctrl {
>>     // 506800000 = 72400000 * 7 (for single-link LVDS, this is enough)
>>     // there is no need to multiply the clock by * 2
>>     assigned-clock-rates = <500000000>, <200000000>, <0>, <0>, <500000000>, <506800000>;
> 
> This assigns "video_pll1" clock rate to 506.8MHz which is currently not
> listed in imx_pll1443x_tbl[].

Since commit b09c68dc57c9 ("clk: imx: pll14xx: Support dynamic rates") 
the 1443x PLLs can be configured to arbitrary rates which for video PLL 
is desirable as those should produce accurate clock.

> Does the below patch[1] fix the regression issue? It explicitly sets
> the clock frequency of the panel timing to 74.25MHz.
> 
> [1] https://patchwork.freedesktop.org/patch/616905/?series=139266&rev=1
That patch is wrong, there is an existing entry for this panel in 
panel-simple.c which is correct and precise, please do not add that kind 
of imprecise duplicate timings into DT.

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