[PATCH 11/11] accel/ivpu: Move secondary preemption buffer allocation to DMA range
Jeffrey Hugo
quic_jhugo at quicinc.com
Fri Oct 18 22:11:15 UTC 2024
On 10/17/2024 8:58 AM, Jacek Lawrynowicz wrote:
> From: Karol Wachowski <karol.wachowski at intel.com>
>
> Secondary preemption buffer is accessible by NPU's DMA and can be
> allocated with addresses above 4 GB. Move secondary preemption buffer
> allocation from SHAVE range which is much smaller (2GB) to DMA range.
> This allows to allocate more command queues with corresponding
> preemption buffers without running out of address range.
>
> Signed-off-by: Karol Wachowski <karol.wachowski at intel.com>
> Reviewed-by: Jacek Lawrynowicz <jacek.lawrynowicz at linux.intel.com>
> Signed-off-by: Jacek Lawrynowicz <jacek.lawrynowicz at linux.intel.com>
Reviewed-by: Jeffrey Hugo <quic_jhugo at quicinc.com>
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