[PATCH v3 1/1] drm/mediatek: dp: Add sdp path reset
CK Hu (胡俊光)
ck.hu at mediatek.com
Wed Oct 23 06:04:47 UTC 2024
Hi, Liankun:
On Wed, 2024-09-25 at 14:48 +0800, Liankun Yang wrote:
> When using type-c to type-c to connect to the monitor,
> the sound plays normally. If you unplug the type-c and
> connect the type-c to hdmi dongle to the monitor, there will be noise.
>
> By capturing the audio data, it is found that
> the data position is messy, and there is no error in the data.
>
> Through experiments, it can be restored by resetting the SDP path
> when unplugging it.
>
> Signed-off-by: Liankun Yang <liankun.yang at mediatek.com>
> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno at collabora.com>
> ---
> Changes in V3:
> - No change.
> Per suggestion from the previous thread:
> https://urldefense.com/v3/__https://patchwork.kernel.org/project/linux-mediatek/patch/20240923132521.22785-1-liankun.yang@mediatek.com/__;!!CTRNKA9wMg0ARbw!mhcYHA4m2S6EpGvYUubMl7eBLyt7SADiPTyQhOa7f0UFswazF0-Y8-lftFpGssdap12777TirJM-pRD_8EvyLSs$
>
> Changes in V2:
> - Fix build error.
> Per suggestion from the previous thread:
> https://urldefense.com/v3/__https://patchwork.kernel.org/project/linux-mediatek/patch/20240923133610.23728-1-liankun.yang@mediatek.com/__;!!CTRNKA9wMg0ARbw!mhcYHA4m2S6EpGvYUubMl7eBLyt7SADiPTyQhOa7f0UFswazF0-Y8-lftFpGssdap12777TirJM-pRD_DlpQdlI$
> ---
> drivers/gpu/drm/mediatek/mtk_dp.c | 15 +++++++++++++++
> drivers/gpu/drm/mediatek/mtk_dp_reg.h | 1 +
> 2 files changed, 16 insertions(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_dp.c b/drivers/gpu/drm/mediatek/mtk_dp.c
> index d8796a904eca..4003bd83f64e 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dp.c
> @@ -1052,6 +1052,18 @@ static void mtk_dp_digital_sw_reset(struct mtk_dp *mtk_dp)
> 0, DP_TX_TRANSMITTER_4P_RESET_SW_DP_TRANS_P0);
> }
>
> +static void mtk_dp_sdp_path_reset(struct mtk_dp *mtk_dp)
> +{
> + mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3004,
> + SDP_RESET_SW_DP_ENC0_P0,
> + SDP_RESET_SW_DP_ENC0_P0);
Align to the right of '('.
> +
> + /* Wait for sdp path reset to complete */
> + usleep_range(1000, 5000);
> + mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3004,
> + 0, SDP_RESET_SW_DP_ENC0_P0);
Ditto.
Regards,
CK
> +}
> +
> static void mtk_dp_set_lanes(struct mtk_dp *mtk_dp, int lanes)
> {
> mtk_dp_update_bits(mtk_dp, MTK_DP_TRANS_P0_35F0,
> @@ -2314,6 +2326,9 @@ static void mtk_dp_bridge_atomic_disable(struct drm_bridge *bridge,
> DP_PWR_STATE_BANDGAP_TPLL,
> DP_PWR_STATE_MASK);
>
> + /* SDP path reset sw*/
> + mtk_dp_sdp_path_reset(mtk_dp);
> +
> /* Ensure the sink is muted */
> msleep(20);
> }
> diff --git a/drivers/gpu/drm/mediatek/mtk_dp_reg.h b/drivers/gpu/drm/mediatek/mtk_dp_reg.h
> index 709b79480693..8ad7a9cc259e 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dp_reg.h
> +++ b/drivers/gpu/drm/mediatek/mtk_dp_reg.h
> @@ -86,6 +86,7 @@
> #define MTK_DP_ENC0_P0_3004 0x3004
> #define VIDEO_M_CODE_SEL_DP_ENC0_P0_MASK BIT(8)
> #define DP_TX_ENCODER_4P_RESET_SW_DP_ENC0_P0 BIT(9)
> +#define SDP_RESET_SW_DP_ENC0_P0 BIT(13)
> #define MTK_DP_ENC0_P0_3010 0x3010
> #define HTOTAL_SW_DP_ENC0_P0_MASK GENMASK(15, 0)
> #define MTK_DP_ENC0_P0_3014 0x3014
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