[PATCH 2/2] drm: bridge: ti-sn65dsi83: Add error recovery mechanism
Marek Vasut
marex at denx.de
Mon Oct 28 14:47:25 UTC 2024
On 10/28/24 2:52 PM, Herve Codina wrote:
> Hi Marek,
Hi,
>>> On Sat, 26 Oct 2024 00:53:51 +0200
>>> Marek Vasut <marex at denx.de> wrote:
>>>
>>>> On 10/24/24 11:55 AM, Herve Codina wrote:
>>>>> In some cases observed during ESD tests, the TI SN65DSI83 cannot recover
>>>>> from errors by itself. A full restart of the bridge is needed in those
>>>>> cases to have the bridge output LVDS signals again.
>>>>
>>>> I have seen the bridge being flaky sometimes, do you have any more
>>>> details of what is going on when this irrecoverable error occurs ?
>>>
>>> The panel attached to the bridge goes and stays black. That's the behavior.
>>> A full reset brings the panel back displaying frames.
>> Is there some noticeable change in 0xe0/0xe1/0xe5 registers, esp. 0xe5,
>> do they indicate the error occurred somehow ?
>
> 0xe5 register can signal any DSI errors (depending on when the ESD affects
> the DSI bus) even PLL unlock bit was observed set but we didn't see any
> relationship between the bits set in 0xe5 register and the recoverable or
> unrecoverable behavior.
>
> Also, in some cases, reading the register was not even possible (i2c
> transaction nacked).
Oh, wow, I haven't seen that one before. But this is really useful
information, can you please add it into the commit message for V2 ?
Thank you
More information about the dri-devel
mailing list