[PATCH 2/3] drm/ast: Use TX-chip register constants

[Jocelyn Falempe]

On 16/09/2024 10:25, Thomas Zimmermann wrote:
> Replace magic values with named constants when reading the TX chip
> from VGACRD1.
> 
Thanks, it looks good to me.

Reviewed-by: Jocelyn Falempe <jfalempe at redhat.com>

> Signed-off-by: Thomas Zimmermann <tzimmermann at suse.de>
> ---
>   drivers/gpu/drm/ast/ast_dp501.c | 13 +++++++------
>   drivers/gpu/drm/ast/ast_main.c  |  9 +++++----
>   drivers/gpu/drm/ast/ast_reg.h   |  2 +-
>   3 files changed, 13 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/gpu/drm/ast/ast_dp501.c b/drivers/gpu/drm/ast/ast_dp501.c
> index e5553334bfde..9e19d8c17730 100644
> --- a/drivers/gpu/drm/ast/ast_dp501.c
> +++ b/drivers/gpu/drm/ast/ast_dp501.c
> @@ -444,18 +444,19 @@ static void ast_init_analog(struct ast_device *ast)
>   
>   void ast_init_3rdtx(struct ast_device *ast)
>   {
> -	u8 jreg;
> +	u8 vgacrd1;
>   
>   	if (IS_AST_GEN4(ast) || IS_AST_GEN5(ast)) {
> -		jreg = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd1, 0xff);
> -		switch (jreg & 0x0e) {
> -		case 0x04:
> +		vgacrd1 = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd1,
> +						 AST_IO_VGACRD1_TX_TYPE_MASK);
> +		switch (vgacrd1) {
> +		case AST_IO_VGACRD1_TX_SIL164_VBIOS:
>   			ast_init_dvo(ast);
>   			break;
> -		case 0x08:
> +		case AST_IO_VGACRD1_TX_DP501_VBIOS:
>   			ast_launch_m68k(ast);
>   			break;
> -		case 0x0c:
> +		case AST_IO_VGACRD1_TX_FW_EMBEDDED_FW:
>   			ast_init_dvo(ast);
>   			break;
>   		default:
> diff --git a/drivers/gpu/drm/ast/ast_main.c b/drivers/gpu/drm/ast/ast_main.c
> index d0e4f0dc9234..7289bdc6066e 100644
> --- a/drivers/gpu/drm/ast/ast_main.c
> +++ b/drivers/gpu/drm/ast/ast_main.c
> @@ -101,12 +101,13 @@ static void ast_detect_tx_chip(struct ast_device *ast, bool need_post)
>   		 * the SOC scratch register #1 bits 11:8 (interestingly marked
>   		 * as "reserved" in the spec)
>   		 */
> -		jreg = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd1, 0xff);
> +		jreg = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd1,
> +					      AST_IO_VGACRD1_TX_TYPE_MASK);
>   		switch (jreg) {
> -		case 0x04:
> +		case AST_IO_VGACRD1_TX_SIL164_VBIOS:
>   			ast->tx_chip = AST_TX_SIL164;
>   			break;
> -		case 0x08:
> +		case AST_IO_VGACRD1_TX_DP501_VBIOS:
>   			ast->dp501_fw_addr = drmm_kzalloc(dev, 32*1024, GFP_KERNEL);
>   			if (ast->dp501_fw_addr) {
>   				/* backup firmware */
> @@ -116,7 +117,7 @@ static void ast_detect_tx_chip(struct ast_device *ast, bool need_post)
>   				}
>   			}
>   			fallthrough;
> -		case 0x0c:
> +		case AST_IO_VGACRD1_TX_FW_EMBEDDED_FW:
>   			ast->tx_chip = AST_TX_DP501;
>   		}
>   	} else if (IS_AST_GEN7(ast)) {
> diff --git a/drivers/gpu/drm/ast/ast_reg.h b/drivers/gpu/drm/ast/ast_reg.h
> index daa5d3a9e6a1..2aadf07d135a 100644
> --- a/drivers/gpu/drm/ast/ast_reg.h
> +++ b/drivers/gpu/drm/ast/ast_reg.h
> @@ -46,7 +46,7 @@
>   #define AST_IO_VGACRD1_TX_CH7003_VBIOS		0x06
>   #define AST_IO_VGACRD1_TX_DP501_VBIOS		0x08
>   #define AST_IO_VGACRD1_TX_ANX9807_VBIOS		0x0a
> -#define AST_IO_VGACRD1_TX_FW_EMBEDDED_FW	0x0c
> +#define AST_IO_VGACRD1_TX_FW_EMBEDDED_FW	0x0c /* special case of DP501 */
>   #define AST_IO_VGACRD1_TX_ASTDP			0x0e
>   
>   #define AST_IO_VGACRD7_EDID_VALID_FLAG	BIT(0)