[PATCH] drm/msm/a6xx+: Insert a fence wait before SMMU table update
Akhil P Oommen
quic_akhilpo at quicinc.com
Tue Sep 17 14:52:03 UTC 2024
On Tue, Sep 17, 2024 at 03:47:09PM +0200, Konrad Dybcio wrote:
> On 13.09.2024 9:51 PM, Rob Clark wrote:
> > From: Rob Clark <robdclark at chromium.org>
> >
> > The CP_SMMU_TABLE_UPDATE _should_ be waiting for idle, but on some
> > devices (x1-85, possibly others), it seems to pass that barrier while
> > there are still things in the event completion FIFO waiting to be
> > written back to memory.
>
> Can we try to force-fault around here on other GPUs and perhaps
> limit this workaround?
>
> Akhil, do we have any insight on this?
Nothing at the moment. I will check this further.
-Akhil.
>
> Konrad
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