[PATCH v2 10/10] arm64: dts: qcom: sar2130p: add display nodes
Konrad Dybcio
konrad.dybcio at oss.qualcomm.com
Mon Apr 14 11:39:56 UTC 2025
On 4/14/25 1:37 PM, Dmitry Baryshkov wrote:
> On Mon, Apr 14, 2025 at 01:13:28PM +0200, Konrad Dybcio wrote:
>> On 3/14/25 7:09 AM, Dmitry Baryshkov wrote:
>>> From: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
>>>
>>> Add display controller, two DSI hosts, two DSI PHYs and a single DP
>>> controller. Link DP to the QMP Combo PHY.
>>>
>>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
>>> ---
>>
>> [...]
>>
>>> + mdss_mdp: display-controller at ae01000 {
>>> + compatible = "qcom,sar2130p-dpu";
>>> + reg = <0x0 0x0ae01000 0x0 0x8f000>,
>>> + <0x0 0x0aeb0000 0x0 0x2008>;
>>
>> size = 0x3000
>
> Existing platforms (including SM8650) use 0x2008 here. Would you like to
> change all the platforms and why?
The last register is base+0x2004 but the region is 0x3000-sized on 2130
[...]
>>> +
>>> + opp-540000000 {
>>> + opp-hz = /bits/ 64 <540000000>;
>>> + required-opps = <&rpmhpd_opp_svs_l1>;
>>> + };
>> Weirdly enough the 540 rate isn't in the clock plan for the pclk
>> and so isn't 162
>
> Nevertheless we need them for the DP to work.
I would assume one would like to have dp compliance, so perhaps they were
just not on the very page I looked at..
Konrad
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