[PATCH] drm/ttm: WIP limit the TTM pool to 32bit CPUs

[Thomas Hellström]

On Tue, 2025-08-12 at 11:17 +0200, Christian König wrote:
> On 11.08.25 17:16, Thomas Hellström wrote:
> > > 
> > > > FWIW If I understand the code correctly, i915 bypasses this by
> > > > setting
> > > > up user-space mappings not by vm_insert_pfn_prot() but using
> > > > apply_to_page_range(), mapping the whole bo.
> > > 
> > > Yeah, that's probably not something we can do. Even filling in
> > > 2MiB
> > > of address space at a time caused performance problems for TTM.
> > 
> > Wasn't that because of repeated calls to vmf_insert_pfn_prot(),
> > repeating the caching checks and page-table walk all the time? 
> 
> Only partially, the main problem was that only a fraction of the BO
> was actually CPU accessed. So filling in more than faulted was just
> overhead.
> 
> > I think apply_to_page_range() should be pretty fast. Also, to avoid
> > regressions due to changing the number of prefaulted pages, we
> > could
> > perhaps honor the MADV_RANDOM and MADV_SEQUENTIAL advises for UMD
> > to
> > use; one faulting a single page only, one faulting the whole bo
> 
> Ah! In my thinking apply_to_page_range() would always fault in the
> whole BO, if that still works for only a partial range than that
> should be ok.

Yes, it looks like it works with partial ranges.

> 
> > , but
> > also see below:
> > 
> > > 
> > > We should probably just drop overriding the attributes in
> > > vmf_insert_pfn_prot().
> > 
> > I think either solution will see resistance with arch people. We
> > should
> > probably involve them in the discussion.
> 
> Any specific person I should CC or just x86 at kernel.org?

scripts/get_maintainer.pl of a tiny change into the PAT code gives me
the following: Hopefully some of these should trigger some replies and
insights:


./scripts/get_maintainer.pl 0001-arch-mm-dummy-commit.patch 
Dave Hansen <dave.hansen at linux.intel.com> (maintainer:X86 MM)
Andy Lutomirski <luto at kernel.org> (maintainer:X86 MM)
Peter Zijlstra <peterz at infradead.org> (maintainer:X86 MM)
Thomas Gleixner <tglx at linutronix.de> (maintainer:X86 ARCHITECTURE (32-
BIT AND 64-BIT))
Ingo Molnar <mingo at redhat.com> (maintainer:X86 ARCHITECTURE (32-BIT AND
64-BIT),commit_signer:10/16=62%,authored:2/16=12%)
Borislav Petkov <bp at alien8.de> (maintainer:X86 ARCHITECTURE (32-BIT AND
64-BIT))
x86 at kernel.org (maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT))
"H. Peter Anvin" <hpa at zytor.com> (reviewer:X86 ARCHITECTURE (32-BIT AND
64-BIT))
Andrew Morton <akpm at linux-foundation.org> (commit_signer:7/16=44%)
David Hildenbrand <david at redhat.com>
(commit_signer:6/16=38%,authored:6/16=38%,added_lines:68/105=65%,remove

d_lines:214/292=73%)
"Liam R. Howlett" <Liam.Howlett at oracle.com> (commit_signer:5/16=31%)
Lorenzo Stoakes <lorenzo.stoakes at oracle.com> (commit_signer:5/16=31%)
Sean Christopherson <seanjc at google.com>
(authored:2/16=12%,added_lines:15/105=14%,removed_lines:31/292=11%)
"Thomas Hellström" <thomas.hellstrom at linux.intel.com>
(authored:1/16=6%)
Shivank Garg <shivankg at amd.com> (authored:1/16=6%)
Peter Xu <peterx at redhat.com> (added_lines:7/105=7%)
Dan Williams <dan.j.williams at intel.com> (removed_lines:27/292=9%)


> 
> Thanks,
> Christian