[PATCH v2 13/13] arm64: dts: st: add loopback clocks on LTDC node
Raphael Gallais-Pou
raphael.gallais-pou at foss.st.com
Tue Aug 12 13:49:10 UTC 2025
ck_ker_ltdc has the CLK_SET_RATE_PARENT flag. While having this flag is
semantically correct, it for now leads to an improper setting of the
clock rate. The ck_ker_ltdc parent clock is the flexgen 27, which does
not support changing rates yet. To overcome this issue, a fixed clock
can be used for the kernel clock.
Add the clocks needed for the LTDC to work.
Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou at foss.st.com>
---
arch/arm64/boot/dts/st/stm32mp251.dtsi | 6 ++++++
arch/arm64/boot/dts/st/stm32mp255.dtsi | 5 +++++
2 files changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi
index d833b2b7904bef1cf1db8f1da210a1abd8a87d09..55f63cb7b881a91498042a71fcd39ac5191ad47d 100644
--- a/arch/arm64/boot/dts/st/stm32mp251.dtsi
+++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi
@@ -52,6 +52,12 @@ clk_rcbsec: clk-rcbsec {
compatible = "fixed-clock";
clock-frequency = <64000000>;
};
+
+ clk_flexgen_27_fixed: clk-54000000 {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <54000000>;
+ };
};
firmware {
diff --git a/arch/arm64/boot/dts/st/stm32mp255.dtsi b/arch/arm64/boot/dts/st/stm32mp255.dtsi
index a3b5ae25d28c83ade12c2ff69b82c9cccfd29b00..07c200470b2cedde771ae987f2267d6097ea78f0 100644
--- a/arch/arm64/boot/dts/st/stm32mp255.dtsi
+++ b/arch/arm64/boot/dts/st/stm32mp255.dtsi
@@ -5,6 +5,11 @@
*/
#include "stm32mp253.dtsi"
+<dc {
+ clocks = <&clk_flexgen_27_fixed>, <&rcc CK_BUS_LTDC>, <&syscfg>, <&lvds>;
+ clock-names = "lcd", "bus", "ref", "lvds";
+};
+
&rifsc {
lvds: lvds at 48060000 {
compatible = "st,stm32mp255-lvds", "st,stm32mp25-lvds";
--
2.25.1
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