[PATCH v3 2/2] drm: bridge: Add support for Solomon SSD2825 RGB/DSI bridge
Svyatoslav Ryhel
clamor95 at gmail.com
Mon Feb 24 07:23:57 UTC 2025
пн, 24 лют. 2025 р. о 04:10 Dmitry Baryshkov <dmitry.baryshkov at linaro.org> пише:
>
> On Sun, Feb 23, 2025 at 05:32:44PM +0200, Svyatoslav Ryhel wrote:
> > SSD2825 is a cost-effective MIPI Bridge Chip solution targeting mainly
> > smartphones. It can convert 24bit RGB interface into 4-lane MIPI-DSI
> > interface to drive display modules of up to 800 x 1366, while supporting
> > AMOLED, a-si LCD or LTPS panel technologies for smartphone applications.
> >
> > Signed-off-by: Svyatoslav Ryhel <clamor95 at gmail.com>
> > ---
> > drivers/gpu/drm/bridge/Kconfig | 13 +
> > drivers/gpu/drm/bridge/Makefile | 1 +
> > drivers/gpu/drm/bridge/ssd2825.c | 821 +++++++++++++++++++++++++++++++
> > 3 files changed, 835 insertions(+)
> > create mode 100644 drivers/gpu/drm/bridge/ssd2825.c
> >
>
> > +
> > + if (buf == MIPI_DCS_SET_DISPLAY_ON) {
> > + /*
> > + * NOTE! This is here since it cannot be called in bridge enable because
> > + * bridge pre enable and bridge enable have no gap in between.
> > + *
> > + * Existing framework bridge-panel seq is:
> > + * panel_prepare > bridge_pre_enable > bridge_enable > panel_enable
> > + *
> > + * Using prepare_prev_first was tested, but it switches seq like this:
> > + * bridge_pre_enable > panel_prepare > bridge_enable > panel_enable
> > + *
> > + * This will not work since panel hw MUST be prepared before bridge is
> > + * configured. Correct seq should be:
> > + * panel_prepare > bridge_pre_enable > panel_enable > bridge_enable
> > + *
> > + * Last two functions are swapped related to existing framework. I am not
> > + * aware about method which allows that.
> > + *
> > + * Once there will be such method/flag, code below should be moved into
> > + * bridge_enable since it is basically a bridge configuration completing
> > + * after initial panel DSI sequence is completed.
>
> Will bridge_pre_enable -> panel_prepare (including
> MIPI_DCS_SET_DISPLAY_ON) -> bridge_enable work?
>
> The rest looks good to me.
>
I wish. I have tested that configuration already and panel did not
work. Problem here is that panel must be enabled before bridge.
Correct sequence should be:
Panel is enabled (power seq, reset, etc.) > bridge is enabled (power
seq, reset, initial configuration) > panel sends init DSI seq > bridge
completes setup with code below.
Basically this part of transfer should be called after last DSI
command is sent, but ATM I see no valid solution to this issue apart
this quirk (keep in mind that panel must be enabled before bridge so
drm_panel.prepare_prev_first will not work).
The most appropriate solution would be addition of atomic_post_enable
call just after panel or next bridge enable, this would ensure that
cases with bridge like I have could be properly configured. Though, I
really do not want to touch framework, since it never ended up well.
Or, alternatively, a flag for a bridge which can swap bridge enable
and panel enable, like drm_panel.prepare_prev_first does for
pre_enable and prepare.
> > + */
> > + config = SSD2825_CONF_REG_HS | SSD2825_CONF_REG_DCS |
> > + SSD2825_CONF_REG_ECD | SSD2825_CONF_REG_EOT;
> > +
> > + if (dsi_dev->mode_flags & MIPI_DSI_MODE_VIDEO)
> > + config |= SSD2825_CONF_REG_VEN;
> > +
> > + if (dsi_dev->mode_flags & MIPI_DSI_MODE_NO_EOT_PACKET)
> > + config &= ~SSD2825_CONF_REG_EOT;
> > +
> > + /* Complete configuration after DSI commands were sent */
> > + ssd2825_write_reg(priv, SSD2825_CONFIGURATION_REG, config);
> > + ssd2825_write_reg(priv, SSD2825_PLL_CTRL_REG, 0x0001);
> > + ssd2825_write_reg(priv, SSD2825_VC_CTRL_REG, 0x0000);
> > + }
> > +
> > + return 0;
> > +}
> > +
> >
>
> --
> With best wishes
> Dmitry
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