[PATCH v5 2/4] arm64: dts: qcom: sa8775p: add GDSP fastrpc-compute-cb nodes
Ling Xu
quic_lxu5 at quicinc.com
Wed Jul 2 02:53:39 UTC 2025
Add GDSP0 and GDSP1 fastrpc compute-cb nodes for sa8775p SoC.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov at oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio at oss.qualcomm.com>
Signed-off-by: Ling Xu <quic_lxu5 at quicinc.com>
---
arch/arm64/boot/dts/qcom/sa8775p.dtsi | 57 +++++++++++++++++++++++++++
1 file changed, 57 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
index fed34717460f..5ebc058931ad 100644
--- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
+++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
@@ -6080,6 +6080,34 @@ IPCC_MPROC_SIGNAL_GLINK_QMP
label = "gpdsp0";
qcom,remote-pid = <17>;
+
+ fastrpc {
+ compatible = "qcom,fastrpc";
+ qcom,glink-channels = "fastrpcglink-apps-dsp";
+ label = "gdsp0";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compute-cb at 1 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <1>;
+ iommus = <&apps_smmu 0x38a1 0x0>;
+ dma-coherent;
+ };
+
+ compute-cb at 2 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <2>;
+ iommus = <&apps_smmu 0x38a2 0x0>;
+ dma-coherent;
+ };
+ compute-cb at 3 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <3>;
+ iommus = <&apps_smmu 0x38a3 0x0>;
+ dma-coherent;
+ };
+ };
};
};
@@ -6123,6 +6151,35 @@ IPCC_MPROC_SIGNAL_GLINK_QMP
label = "gpdsp1";
qcom,remote-pid = <18>;
+
+ fastrpc {
+ compatible = "qcom,fastrpc";
+ qcom,glink-channels = "fastrpcglink-apps-dsp";
+ label = "gdsp1";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compute-cb at 1 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <1>;
+ iommus = <&apps_smmu 0x38c1 0x0>;
+ dma-coherent;
+ };
+
+ compute-cb at 2 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <2>;
+ iommus = <&apps_smmu 0x38c2 0x0>;
+ dma-coherent;
+ };
+
+ compute-cb at 3 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <3>;
+ iommus = <&apps_smmu 0x38c3 0x0>;
+ dma-coherent;
+ };
+ };
};
};
--
2.34.1
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