[PATCH] drm/rockchip: vop2: Fix the update of LAYER/PORT select registers when there are multi display output on rk3588/rk3568

[Heiko Stuebner]

On Mon, 21 Apr 2025 18:21:54 +0800, Andy Yan wrote:
> The all video ports of rk3568/rk3588 share the same OVL_LAYER_SEL
> and OVL_PORT_SEL registers, and the configuration of these two registers
> can be set to take effect when the vsync signal arrives at a certain Video
> Port.
> 
> If two threads for two display output choose to update these two registers
> simultaneously to meet their own plane adjustment requirements(change plane
> zpos or switch plane from one crtc to another), then no matter which Video
> Port'svsync signal we choose to follow for these two registers, the display
> output of the other Video Port will be abnormal.
> This is because the configuration of this Video Port does not take
> effect at the right time (its configuration should take effect when its
> VSYNC signal arrives).
> 
> [...]

Applied, thanks!

[1/1] drm/rockchip: vop2: Fix the update of LAYER/PORT select registers when there are multi display output on rk3588/rk3568
      commit: 3e89a8c6835476aa782da80585dee9ddae651eea

Best regards,
-- 
Heiko Stuebner <heiko at sntech.de>