[PATCH 0/2] Remove hard coded values for MIPI-DSI

[Chris Brandt]

When the initial drivers were submitted, some of the timing was hard coded and
did not allow for any MIPI-DSI panel to be attached.

This series assumes the follow patches have been applied.
Both patches exist in drm-misc-next.

5ce16c169a4c ("drm: renesas: rz-du: Add atomic_pre_enable")
6f392f371650 ("drm: renesas: rz-du: Implement MIPI DSI host transfers")



Chris Brandt (2):
  clk: renesas: rzg2l: Remove DSI clock rate restrictions
  drm: renesas: rz-du: Set DSI divider based on target MIPI device

 drivers/clk/renesas/rzg2l-cpg.c               | 113 ++++++++++++++++--
 .../gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c    |  17 +++
 include/linux/clk/renesas.h                   |   4 +
 3 files changed, 124 insertions(+), 10 deletions(-)

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2.49.0