[PATCH v3 drm-dp 10/11] drm/hisilicon/hibmc: adapting modification for the former commit
Yongbang Shi
shiyongbang at huawei.com
Fri Jul 18 06:51:24 UTC 2025
From: Baihan Li <libaihan at huawei.com>
Add colorbar disable operation before reset chontroller, to make sure
colorbar status is clear in the DP init, so if rmmod the driver and the
previous colorbar configuration will not affect the next time insmod the
driver.
Fixes: 3c7623fb5bb6 ("drm/hisilicon/hibmc: Enable this hot plug detect of irq feature")
Signed-off-by: Baihan Li <libaihan at huawei.com>
Signed-off-by: Yongbang Shi <shiyongbang at huawei.com>
---
ChangeLog:
v2 -> v3:
- fix the issue commit ID, suggested by Dmitry Baryshkov.
- split into 2 commits, suggested by Dmitry Baryshkov.
- add more comments in commit log, suggested by Dmitry Baryshkov.
---
drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c b/drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c
index 36daf7542d40..85499f1ace8b 100644
--- a/drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c
+++ b/drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c
@@ -180,6 +180,8 @@ int hibmc_dp_hw_init(struct hibmc_dp *dp)
/* int init */
writel(0, dp_dev->base + HIBMC_DP_INTR_ENABLE);
writel(HIBMC_DP_INT_RST, dp_dev->base + HIBMC_DP_INTR_ORIGINAL_STATUS);
+ /* clr colorbar */
+ writel(0, dp_dev->base + HIBMC_DP_COLOR_BAR_CTRL);
/* rst */
writel(0, dp_dev->base + HIBMC_DP_DPTX_RST_CTRL);
usleep_range(30, 50);
--
2.33.0
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