[PATCH v8 2/3] drm/amdgpu: Add CRIU mapping info ioctl
David Francis
David.Francis at amd.com
Fri Jul 18 14:48:22 UTC 2025
Add new ioctl DRM_IOCTL_AMDGPU_CRIU_MAPPING_INFO, which
returns a list of mappings associated with a given bo, along with
their positions and offsets.
Signed-off-by: David Francis <David.Francis at amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_criu.c | 97 ++++++++++++++++++++++++
drivers/gpu/drm/amd/amdgpu/amdgpu_criu.h | 3 +
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 5 ++
include/uapi/drm/amdgpu_drm.h | 27 +++++++
5 files changed, 133 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_criu.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_criu.c
index 8bfcb2234166..176ea7c0ee3f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_criu.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_criu.c
@@ -24,6 +24,7 @@
#include <drm/amdgpu_drm.h>
#include <drm/drm_device.h>
#include <drm/drm_file.h>
+#include <drm/drm_exec.h>
#include "amdgpu_criu.h"
#include "amdgpu.h"
@@ -99,3 +100,99 @@ int amdgpu_criu_bo_info_ioctl(struct drm_device *dev, void *data,
return ret;
}
+
+/**
+ * amdgpu_criu_mapping_info_ioctl - get information about a buffer's mappings
+ *
+ * @dev: drm device pointer
+ * @data: drm_amdgpu_criu_mapping_info_args
+ * @filp: drm file pointer
+ *
+ * num_mappings is set as an input to the size of the vm_buckets array.
+ * num_mappings is sent back as output as the number of mappings the bo has.
+ * If that number is larger than the size of the array, the ioctl must
+ * be retried.
+ *
+ * Returns:
+ * 0 for success, -errno for errors.
+ */
+int amdgpu_criu_mapping_info_ioctl(struct drm_device *dev, void *data,
+ struct drm_file *filp)
+{
+ struct drm_amdgpu_criu_mapping_info_args *args = data;
+ struct drm_gem_object *gobj = idr_find(&filp->object_idr, args->gem_handle);
+ struct amdgpu_vm *avm = &((struct amdgpu_fpriv *)filp->driver_priv)->vm;
+ struct amdgpu_bo *bo = gem_to_amdgpu_bo(gobj);
+ struct amdgpu_bo_va *bo_va = amdgpu_vm_bo_find(avm, bo);
+ struct amdgpu_fpriv *fpriv = filp->driver_priv;
+ struct drm_amdgpu_criu_vm_bucket *vm_buckets;
+ struct amdgpu_bo_va_mapping *mapping;
+ struct drm_exec exec;
+ int num_mappings = 0;
+ int ret;
+
+ vm_buckets = kvcalloc(args->num_mappings, sizeof(*vm_buckets), GFP_KERNEL);
+ if (!vm_buckets) {
+ ret = -ENOMEM;
+ goto free_vms;
+ }
+
+ drm_exec_init(&exec, DRM_EXEC_INTERRUPTIBLE_WAIT |
+ DRM_EXEC_IGNORE_DUPLICATES, 0);
+ drm_exec_until_all_locked(&exec) {
+ if (gobj) {
+ ret = drm_exec_lock_obj(&exec, gobj);
+ drm_exec_retry_on_contention(&exec);
+ if (ret)
+ goto unlock_exec;
+ }
+
+ ret = amdgpu_vm_lock_pd(&fpriv->vm, &exec, 2);
+ drm_exec_retry_on_contention(&exec);
+ if (ret)
+ goto unlock_exec;
+ }
+
+ amdgpu_vm_bo_va_for_each_valid_mapping(bo_va, mapping) {
+ if (num_mappings < args->num_mappings) {
+ vm_buckets[num_mappings].start = mapping->start;
+ vm_buckets[num_mappings].last = mapping->last;
+ vm_buckets[num_mappings].offset = mapping->offset;
+ vm_buckets[num_mappings].flags = mapping->flags;
+ }
+ num_mappings += 1;
+ }
+
+ amdgpu_vm_bo_va_for_each_invalid_mapping(bo_va, mapping) {
+ if (num_mappings < args->num_mappings) {
+ vm_buckets[num_mappings].start = mapping->start;
+ vm_buckets[num_mappings].last = mapping->last;
+ vm_buckets[num_mappings].offset = mapping->offset;
+ vm_buckets[num_mappings].flags = mapping->flags;
+ }
+ num_mappings += 1;
+ }
+
+ drm_exec_fini(&exec);
+
+ if (num_mappings > 0) {
+ if (num_mappings <= args->num_mappings) {
+ ret = copy_to_user((void __user *)args->vm_buckets, vm_buckets, num_mappings * sizeof(*vm_buckets));
+ if (ret) {
+ pr_debug("Failed to copy BO information to user\n");
+ ret = -EFAULT;
+ }
+ }
+ }
+ args->num_mappings = num_mappings;
+
+ kvfree(vm_buckets);
+
+ return ret;
+unlock_exec:
+ drm_exec_fini(&exec);
+free_vms:
+ kvfree(vm_buckets);
+
+ return ret;
+}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_criu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_criu.h
index c991d08262c1..d2edce3b75f5 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_criu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_criu.h
@@ -27,4 +27,7 @@
int amdgpu_criu_bo_info_ioctl(struct drm_device *dev, void *data,
struct drm_file *filp);
+int amdgpu_criu_mapping_info_ioctl(struct drm_device *dev, void *data,
+ struct drm_file *filp);
+
#endif
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 28a057db4718..cefa2661449a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -3029,6 +3029,7 @@ const struct drm_ioctl_desc amdgpu_ioctls_kms[] = {
DRM_IOCTL_DEF_DRV(AMDGPU_USERQ_SIGNAL, amdgpu_userq_signal_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(AMDGPU_USERQ_WAIT, amdgpu_userq_wait_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(AMDGPU_CRIU_BO_INFO, amdgpu_criu_bo_info_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),
+ DRM_IOCTL_DEF_DRV(AMDGPU_CRIU_MAPPING_INFO, amdgpu_criu_mapping_info_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),
};
static const struct drm_driver amdgpu_kms_driver = {
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
index f9549f6b3d1f..5a63ae490b0e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
@@ -668,4 +668,9 @@ void amdgpu_vm_tlb_fence_create(struct amdgpu_device *adev,
struct amdgpu_vm *vm,
struct dma_fence **fence);
+#define amdgpu_vm_bo_va_for_each_valid_mapping(bo_va, mapping) \
+ list_for_each_entry(mapping, &bo_va->valids, list)
+#define amdgpu_vm_bo_va_for_each_invalid_mapping(bo_va, mapping) \
+ list_for_each_entry(mapping, &bo_va->invalids, list)
+
#endif
diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
index 6a69db9f8648..0d04cb5bc5e4 100644
--- a/include/uapi/drm/amdgpu_drm.h
+++ b/include/uapi/drm/amdgpu_drm.h
@@ -58,6 +58,7 @@ extern "C" {
#define DRM_AMDGPU_USERQ_SIGNAL 0x17
#define DRM_AMDGPU_USERQ_WAIT 0x18
#define DRM_AMDGPU_CRIU_BO_INFO 0x19
+#define DRM_AMDGPU_CRIU_MAPPING_INFO 0x20
#define DRM_IOCTL_AMDGPU_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_CREATE, union drm_amdgpu_gem_create)
#define DRM_IOCTL_AMDGPU_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_MMAP, union drm_amdgpu_gem_mmap)
@@ -79,6 +80,7 @@ extern "C" {
#define DRM_IOCTL_AMDGPU_USERQ_SIGNAL DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_USERQ_SIGNAL, struct drm_amdgpu_userq_signal)
#define DRM_IOCTL_AMDGPU_USERQ_WAIT DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_USERQ_WAIT, struct drm_amdgpu_userq_wait)
#define DRM_IOCTL_AMDGPU_CRIU_BO_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_CRIU_BO_INFO, struct drm_amdgpu_criu_bo_info_args)
+#define DRM_IOCTL_AMDGPU_CRIU_MAPPING_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_CRIU_MAPPING_INFO, struct drm_amdgpu_criu_mapping_info_args)
/**
* DOC: memory domains
@@ -1656,6 +1658,31 @@ struct drm_amdgpu_criu_bo_bucket {
__u32 gem_handle;
};
+struct drm_amdgpu_criu_mapping_info_args {
+ /* Handle of bo to get mappings of */
+ __u32 gem_handle;
+
+ /* IN: Size of vm_buckets buffer. OUT: Number of bos in process (if larger than size of buffer, must retry) */
+ __u32 num_mappings;
+
+ /* User pointer to array of drm_amdgpu_criu_vm_bucket */
+ __u64 vm_buckets;
+};
+
+struct drm_amdgpu_criu_vm_bucket {
+ /* Start of mapping (in number of pages) */
+ __u64 start;
+
+ /* End of mapping (in number of pages) */
+ __u64 last;
+
+ /* Mapping offset */
+ __u64 offset;
+
+ /* flags needed to recreate mapping */
+ __u64 flags;
+};
+
#if defined(__cplusplus)
}
#endif
--
2.34.1
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