[PATCH v2 1/4] drm: Define user readable error codes for atomic ioctl

[Xaver Hugl]

Am Mi., 30. Juli 2025 um 12:36 Uhr schrieb Arun R Murthy
<arun.r.murthy at intel.com>:
>
> There can be multiple reasons for a failure in atomic_ioctl. Most often
> in these error conditions -EINVAL is returned. User/Compositor would
> have to blindly take a call on failure of this ioctl so as to use
> ALLOW_MODESET or any. It would be good if user/compositor gets a
> readable error code on failure so they can take proper corrections in
> the next commit.
> The struct drm_mode_atomic is being passed by the user/compositor which
> holds the properties for modeset/flip. Reusing the same struct for
> returning the error code in case of failure can save by creating a new
> uapi/interface for returning the error code.
> The element 'reserved' in the struct drm_mode_atomic is used for
> returning the user readable error code.Its a 64bit variable and
> should suffice 64 error codes that should be sufficient.
Hi, and thanks for working on this. Harry already mentioned what we
discussed at the hackfest, so I won't repeat that again :)

> +/* atomic not set in the drm_file */
> +#define DRM_MODE_ATOMIC_CAP_NOT_ENABLED                        BIT(0)
> +/* atomic flag passed not in DRM_MODE_ATOMIC_FLAGS list */
> +#define DRM_MODE_ATOMIC_INVALID_FLAG                   BIT(1)
> +/* DRM_MODE_PAGE_FLIP_LEGACY not supported with atomic ioctl  */
This should be DRM_MODE_PAGE_FLIP_ASYNC I think?
> +#define DRM_MODE_ATOMIC_PAGE_FLIP_ASYNC                        BIT(2)
> +/* flip event with atomic check only not supported */
> +#define DRM_MODE_ATOMIC_FLIP_EVENT_WITH_CHECKONLY      BIT(3)
> +/* atomic property change requested need full crtc modeset */
> +#define DRM_MODE_ATOMIC_CRTC_NEED_FULL_MODESET         BIT(4)
> +/* atomic property change requested has impact on all connected crtc */
> +#define DRM_MODE_ATOMIC_NEED_FULL_MODESET              BIT(5)
> +/* async flip supported on only primary plane */
> +#define DRM_MODE_ATOMIC_ASYNC_NOT_PRIMARY              BIT(6)
This is a bit limiting when some but not all non-primary planes support async.
> +/* modifier not supported by async flip */
> +#define DRM_MODE_ATOMIC_ASYNC_MODIFIER_NOT_SUPPORTED   BIT(7)
> +/* async flip with pipe joiner not allowed */
> +#define DRM_MODE_ATOMIC_ASYNC_PIPEJOINER_NOTALLOWED    BIT(8)
I feel like this error is a bit too specific, or at least it needs
some more explanation - what will compositors do with it?

In general I want to mention that some of these errors are pretty
specific and not actionable for compositor code. Ideally the enum
would just be more generic things like
- invalid API usage
- needs modeset
- plane can't do async
- format/modifier can't do async (though with IN_FORMATS_ASYNC it's
kind of just "invalid API usage")
- scanout bandwidth
- connector bandwidth
- memory domain
- scanin bandwidth

which (except for "invalid API usage") compositor code can
automatically do something about, and the string that's passed to the
compositor can give more information for debugging and logging.

- Xaver