drm/ttm: port ttm pools to NUMA aware lru_list
Christian König
christian.koenig at amd.com
Thu Jun 5 08:34:11 UTC 2025
On 6/5/25 08:19, Dave Airlie wrote:
> (RH email ate this the first time).
>
> This is a bit of a tangent before continuing the tangent that is memcg aware pools.
>
> The pools code is already NUMA aware, but it rolls it's own numa awareness, and
> in order to move towards memcg awareness, I think a first step is porting the pool
> code to lru_list and making the current shrinker NUMA aware. Once this is done
> then the next step should be to make the pools/shrinker memcg aware.
>
> I've done light testing of this on a single node rx7900xt and a 4 node MI300A,
> and it seems to operate the way I'd expect, but just wanted to get some feedback on
> the idea and if anyone can spot any big problems with the strategy.
Since the list_lru_add requires the RCU look I think we can also nuke the spinlock protection since the LRU is self protected, isn't it?
Except for that and a few style nit picks it looks absolutely sane to me.
Regards,
Christian.
>
> Thanks,
> Dave.
>
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