[PATCH] drm/bridge: anx7625: Fix invalid EDID size

Maxime Ripard mripard at kernel.org
Mon Jun 30 07:07:50 UTC 2025


Hi,

On Sun, Jun 29, 2025 at 04:38:36AM +0200, Loic Poulain wrote:
> DRM checks EDID block count against allocated size in drm_edid_valid
> function. We have to allocate the right EDID size instead of the max
> size to prevent the EDID to be reported as invalid.
> 
> Fixes: 7c585f9a71aa ("drm/bridge: anx7625: use struct drm_edid more")
> Signed-off-by: Loic Poulain <loic.poulain at oss.qualcomm.com>
> ---
>  drivers/gpu/drm/bridge/analogix/anx7625.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c b/drivers/gpu/drm/bridge/analogix/anx7625.c
> index 8a9079c2ed5c..5a81d1bfc815 100644
> --- a/drivers/gpu/drm/bridge/analogix/anx7625.c
> +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c
> @@ -1801,7 +1801,7 @@ static const struct drm_edid *anx7625_edid_read(struct anx7625_data *ctx)
>  		return NULL;
>  	}
>  
> -	ctx->cached_drm_edid = drm_edid_alloc(edid_buf, FOUR_BLOCK_SIZE);
> +	ctx->cached_drm_edid = drm_edid_alloc(edid_buf, edid_num * ONE_BLOCK_SIZE);
>  	kfree(edid_buf);

Do we need to cache the whole EDIDs? AFAIU, it's only ever used to get
the manufacturer name, which fits into a u32 / 4 u8. We should probably
just cache that.

Maxime
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