[PATCH v5 1/6] drm/xe/xe_gt_pagefault: Disallow writes to read-only VMAs
Gwan-gyeong Mun
gwan-gyeong.mun at intel.com
Fri Mar 7 10:34:58 UTC 2025
On 3/4/25 7:08 PM, Jonathan Cavitt wrote:
> The page fault handler should reject write/atomic access to read only
> VMAs. Add code to handle this in handle_pagefault after the VMA lookup.
>
> Fixes: 3d420e9fa848 ("drm/xe: Rework GPU page fault handling")
> Signed-off-by: Jonathan Cavitt <jonathan.cavitt at intel.com>
> Suggested-by: Matthew Brost <matthew.brost at intel.com>
> ---
> drivers/gpu/drm/xe/xe_gt_pagefault.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/xe_gt_pagefault.c b/drivers/gpu/drm/xe/xe_gt_pagefault.c
> index 17d69039b866..f608a765fa7c 100644
> --- a/drivers/gpu/drm/xe/xe_gt_pagefault.c
> +++ b/drivers/gpu/drm/xe/xe_gt_pagefault.c
> @@ -235,6 +235,11 @@ static int handle_pagefault(struct xe_gt *gt, struct pagefault *pf)
> goto unlock_vm;
> }
>
> + if (xe_vma_read_only(vma) && pf->access_type != ACCESS_TYPE_READ) {
one question, if the PTE Present bit is disabled and the page fault is
caused by atomic load/store eu instruction, will the GuC deliver
pagefault request to KMD with ACCESS_TYPE_READ/ACCESS_TYPE_WRITE Fault
type instead of ACCESS_TYPE_ATOMIC?
G.G.
> + err = -EPERM;
> + goto unlock_vm;
> + }
> +
> err = handle_vma_pagefault(gt, pf, vma);
>
> unlock_vm:
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