[PATCH v6 2/5] dt-bindings: gpu: v3d: Add per-compatible register restrictions

Krzysztof Kozlowski krzk at kernel.org
Tue Mar 18 08:03:41 UTC 2025


On Mon, Mar 17, 2025 at 10:01:10PM -0300, Maíra Canal wrote:
> In order to enforce per-SoC register rules, add per-compatible
> restrictions. For example, V3D 3.3 (used in brcm,7268-v3d) has a cache
> controller (GCA), which is not present in other V3D generations. Declaring
> these differences helps ensure the DTB accurately reflect the hardware
> design.
> 
> The example was using an incorrect order for the register names. This
> commit corrects that by enforcing the order established in the register
> items description.
> 
> Signed-off-by: Maíra Canal <mcanal at igalia.com>
> ---
>  .../devicetree/bindings/gpu/brcm,bcm-v3d.yaml      | 86 ++++++++++++++++++----
>  1 file changed, 73 insertions(+), 13 deletions(-)

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski at linaro.org>

Best regards,
Krzysztof



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