[PATCH] drm/amd/display/dc/irq: Remove duplications of hpd_ack function from IRQ
Alex Hung
alex.hung at amd.com
Fri May 2 23:16:39 UTC 2025
Hi,
Thanks for fixing this.
However, I think checkpatch reports some warnings, including spacing
warning and a mismatch author name vs SOB as below. Once they are fixed
in V2 I will send them to test.
$ ./scripts/checkpatch.pl
drm-amd-display-dc-irq-Remove-duplications-of-hpd_ack-function-from-IRQ.patch.patch
WARNING: please, no space before tabs
#816: FILE: drivers/gpu/drm/amd/display/dc/irq/irq_service.c:44:
+#define HPD0_DC_HPD_INT_STATUS__DC_HPD_SENSE_DELAYED_MASK
^I0x00000010L$
WARNING: please, no space before tabs
#817: FILE: drivers/gpu/drm/amd/display/dc/irq/irq_service.c:45:
+#define HPD0_DC_HPD_INT_CONTROL__DC_HPD_INT_POLARITY_MASK
^I0x00000100L$
WARNING: please, no space before tabs
#821: FILE: drivers/gpu/drm/amd/display/dc/irq/irq_service.c:49:
+#define DC_HPD1_INT_STATUS__DC_HPD1_SENSE_DELAYED_MASK ^I^I^I0x10$
WARNING: please, no space before tabs
#822: FILE: drivers/gpu/drm/amd/display/dc/irq/irq_service.c:50:
+#define DC_HPD1_INT_STATUS__DC_HPD1_SENSE_DELAYED__SHIFT ^I^I0x4$
WARNING: please, no space before tabs
#823: FILE: drivers/gpu/drm/amd/display/dc/irq/irq_service.c:51:
+#define DC_HPD1_INT_CONTROL__DC_HPD1_INT_POLARITY_MASK ^I^I^I0x100$
WARNING: please, no space before tabs
#824: FILE: drivers/gpu/drm/amd/display/dc/irq/irq_service.c:52:
+#define DC_HPD1_INT_CONTROL__DC_HPD1_INT_POLARITY__SHIFT ^I^I0x8$
WARNING: From:/Signed-off-by: email address mismatch: 'From: Sebastian
Aguilera Novoa <saguileranbr at gmail.com>' != 'Signed-off-by: Sebastian
Aguilera Novoa <saguileran at ime.usp.br>'
On 5/1/25 16:53, Sebastian Aguilera Novoa wrote:
> The major of dcn and dce irqs share a copy-pasted collection
> of copy-pasted function, which is: hpd_ack.
>
> This patch removes the multiple copy-pasted by moving them to
> the irq_service.c and make the irq_service's
> calls the functions implemented by the irq_service.c
> instead.
>
> The hpd_ack function is replaced by hpd0_ack and hpd1_ack, the
> required constants are also added.
>
> The changes were not tested on actual hardware. I am only able
> to verify that the changes keep the code compileable and do my
> best to look repeatedly if I am not actually changing any code.
>
> Signed-off-by: Sebastian Aguilera Novoa <saguileran at ime.usp.br>
> ---
> .../dc/irq/dce120/irq_service_dce120.c | 29 +--------
> .../display/dc/irq/dce60/irq_service_dce60.c | 31 +--------
> .../display/dc/irq/dce80/irq_service_dce80.c | 31 +--------
> .../display/dc/irq/dcn10/irq_service_dcn10.c | 29 +--------
> .../display/dc/irq/dcn20/irq_service_dcn20.c | 29 +--------
> .../dc/irq/dcn201/irq_service_dcn201.c | 29 +--------
> .../display/dc/irq/dcn21/irq_service_dcn21.c | 29 +--------
> .../display/dc/irq/dcn30/irq_service_dcn30.c | 30 +--------
> .../dc/irq/dcn302/irq_service_dcn302.c | 19 +-----
> .../dc/irq/dcn303/irq_service_dcn303.c | 19 +-----
> .../display/dc/irq/dcn31/irq_service_dcn31.c | 29 +--------
> .../dc/irq/dcn314/irq_service_dcn314.c | 29 +--------
> .../dc/irq/dcn315/irq_service_dcn315.c | 29 +--------
> .../display/dc/irq/dcn32/irq_service_dcn32.c | 29 +--------
> .../display/dc/irq/dcn35/irq_service_dcn35.c | 29 +--------
> .../dc/irq/dcn351/irq_service_dcn351.c | 29 +--------
> .../display/dc/irq/dcn36/irq_service_dcn36.c | 29 +--------
> .../dc/irq/dcn401/irq_service_dcn401.c | 29 +--------
> .../gpu/drm/amd/display/dc/irq/irq_service.c | 63 +++++++++++++++++++
> .../gpu/drm/amd/display/dc/irq/irq_service.h | 8 +++
> 20 files changed, 89 insertions(+), 489 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/irq/dce120/irq_service_dce120.c b/drivers/gpu/drm/amd/display/dc/irq/dce120/irq_service_dce120.c
> index 953f4a4dacad..33ce470e4c88 100644
> --- a/drivers/gpu/drm/amd/display/dc/irq/dce120/irq_service_dce120.c
> +++ b/drivers/gpu/drm/amd/display/dc/irq/dce120/irq_service_dce120.c
> @@ -37,36 +37,9 @@
>
> #include "ivsrcid/ivsrcid_vislands30.h"
>
> -static bool hpd_ack(
> - struct irq_service *irq_service,
> - const struct irq_source_info *info)
> -{
> - uint32_t addr = info->status_reg;
> - uint32_t value = dm_read_reg(irq_service->ctx, addr);
> - uint32_t current_status =
> - get_reg_field_value(
> - value,
> - HPD0_DC_HPD_INT_STATUS,
> - DC_HPD_SENSE_DELAYED);
> -
> - dal_irq_service_ack_generic(irq_service, info);
> -
> - value = dm_read_reg(irq_service->ctx, info->enable_reg);
> -
> - set_reg_field_value(
> - value,
> - current_status ? 0 : 1,
> - HPD0_DC_HPD_INT_CONTROL,
> - DC_HPD_INT_POLARITY);
> -
> - dm_write_reg(irq_service->ctx, info->enable_reg, value);
> -
> - return true;
> -}
> -
> static struct irq_source_info_funcs hpd_irq_info_funcs = {
> .set = NULL,
> - .ack = hpd_ack
> + .ack = hpd0_ack
> };
>
> static struct irq_source_info_funcs hpd_rx_irq_info_funcs = {
> diff --git a/drivers/gpu/drm/amd/display/dc/irq/dce60/irq_service_dce60.c b/drivers/gpu/drm/amd/display/dc/irq/dce60/irq_service_dce60.c
> index 2c72074310c7..d777b85e70da 100644
> --- a/drivers/gpu/drm/amd/display/dc/irq/dce60/irq_service_dce60.c
> +++ b/drivers/gpu/drm/amd/display/dc/irq/dce60/irq_service_dce60.c
> @@ -46,36 +46,9 @@
>
> #include "dc_types.h"
>
> -static bool hpd_ack(
> - struct irq_service *irq_service,
> - const struct irq_source_info *info)
> -{
> - uint32_t addr = info->status_reg;
> - uint32_t value = dm_read_reg(irq_service->ctx, addr);
> - uint32_t current_status =
> - get_reg_field_value(
> - value,
> - DC_HPD1_INT_STATUS,
> - DC_HPD1_SENSE_DELAYED);
> -
> - dal_irq_service_ack_generic(irq_service, info);
> -
> - value = dm_read_reg(irq_service->ctx, info->enable_reg);
> -
> - set_reg_field_value(
> - value,
> - current_status ? 0 : 1,
> - DC_HPD1_INT_CONTROL,
> - DC_HPD1_INT_POLARITY);
> -
> - dm_write_reg(irq_service->ctx, info->enable_reg, value);
> -
> - return true;
> -}
> -
> static struct irq_source_info_funcs hpd_irq_info_funcs = {
> .set = NULL,
> - .ack = hpd_ack
> + .ack = hpd1_ack
> };
>
> static struct irq_source_info_funcs hpd_rx_irq_info_funcs = {
> @@ -391,5 +364,3 @@ struct irq_service *dal_irq_service_dce60_create(
> dce60_irq_construct(irq_service, init_data);
> return irq_service;
> }
> -
> -
> diff --git a/drivers/gpu/drm/amd/display/dc/irq/dce80/irq_service_dce80.c b/drivers/gpu/drm/amd/display/dc/irq/dce80/irq_service_dce80.c
> index 49317934ef4f..3a9163acb49b 100644
> --- a/drivers/gpu/drm/amd/display/dc/irq/dce80/irq_service_dce80.c
> +++ b/drivers/gpu/drm/amd/display/dc/irq/dce80/irq_service_dce80.c
> @@ -37,36 +37,9 @@
>
> #include "dc_types.h"
>
> -static bool hpd_ack(
> - struct irq_service *irq_service,
> - const struct irq_source_info *info)
> -{
> - uint32_t addr = info->status_reg;
> - uint32_t value = dm_read_reg(irq_service->ctx, addr);
> - uint32_t current_status =
> - get_reg_field_value(
> - value,
> - DC_HPD1_INT_STATUS,
> - DC_HPD1_SENSE_DELAYED);
> -
> - dal_irq_service_ack_generic(irq_service, info);
> -
> - value = dm_read_reg(irq_service->ctx, info->enable_reg);
> -
> - set_reg_field_value(
> - value,
> - current_status ? 0 : 1,
> - DC_HPD1_INT_CONTROL,
> - DC_HPD1_INT_POLARITY);
> -
> - dm_write_reg(irq_service->ctx, info->enable_reg, value);
> -
> - return true;
> -}
> -
> static struct irq_source_info_funcs hpd_irq_info_funcs = {
> .set = NULL,
> - .ack = hpd_ack
> + .ack = hpd1_ack
> };
>
> static struct irq_source_info_funcs hpd_rx_irq_info_funcs = {
> @@ -303,5 +276,3 @@ struct irq_service *dal_irq_service_dce80_create(
> dce80_irq_construct(irq_service, init_data);
> return irq_service;
> }
> -
> -
> diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c b/drivers/gpu/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c
> index 9ca28565a9d1..4ce9edd16344 100644
> --- a/drivers/gpu/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c
> +++ b/drivers/gpu/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c
> @@ -129,36 +129,9 @@ static enum dc_irq_source to_dal_irq_source_dcn10(struct irq_service *irq_servic
> }
> }
>
> -static bool hpd_ack(
> - struct irq_service *irq_service,
> - const struct irq_source_info *info)
> -{
> - uint32_t addr = info->status_reg;
> - uint32_t value = dm_read_reg(irq_service->ctx, addr);
> - uint32_t current_status =
> - get_reg_field_value(
> - value,
> - HPD0_DC_HPD_INT_STATUS,
> - DC_HPD_SENSE_DELAYED);
> -
> - dal_irq_service_ack_generic(irq_service, info);
> -
> - value = dm_read_reg(irq_service->ctx, info->enable_reg);
> -
> - set_reg_field_value(
> - value,
> - current_status ? 0 : 1,
> - HPD0_DC_HPD_INT_CONTROL,
> - DC_HPD_INT_POLARITY);
> -
> - dm_write_reg(irq_service->ctx, info->enable_reg, value);
> -
> - return true;
> -}
> -
> static struct irq_source_info_funcs hpd_irq_info_funcs = {
> .set = NULL,
> - .ack = hpd_ack
> + .ack = hpd0_ack
> };
>
> static struct irq_source_info_funcs hpd_rx_irq_info_funcs = {
> diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c b/drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c
> index 916f0c974637..5847af0e66cb 100644
> --- a/drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c
> +++ b/drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c
> @@ -130,36 +130,9 @@ static enum dc_irq_source to_dal_irq_source_dcn20(
> }
> }
>
> -static bool hpd_ack(
> - struct irq_service *irq_service,
> - const struct irq_source_info *info)
> -{
> - uint32_t addr = info->status_reg;
> - uint32_t value = dm_read_reg(irq_service->ctx, addr);
> - uint32_t current_status =
> - get_reg_field_value(
> - value,
> - HPD0_DC_HPD_INT_STATUS,
> - DC_HPD_SENSE_DELAYED);
> -
> - dal_irq_service_ack_generic(irq_service, info);
> -
> - value = dm_read_reg(irq_service->ctx, info->enable_reg);
> -
> - set_reg_field_value(
> - value,
> - current_status ? 0 : 1,
> - HPD0_DC_HPD_INT_CONTROL,
> - DC_HPD_INT_POLARITY);
> -
> - dm_write_reg(irq_service->ctx, info->enable_reg, value);
> -
> - return true;
> -}
> -
> static struct irq_source_info_funcs hpd_irq_info_funcs = {
> .set = NULL,
> - .ack = hpd_ack
> + .ack = hpd0_ack
> };
>
> static struct irq_source_info_funcs hpd_rx_irq_info_funcs = {
> diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c b/drivers/gpu/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c
> index 1d61d475d36f..6417011d2246 100644
> --- a/drivers/gpu/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c
> +++ b/drivers/gpu/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c
> @@ -80,36 +80,9 @@ static enum dc_irq_source to_dal_irq_source_dcn201(
> }
> }
>
> -static bool hpd_ack(
> - struct irq_service *irq_service,
> - const struct irq_source_info *info)
> -{
> - uint32_t addr = info->status_reg;
> - uint32_t value = dm_read_reg(irq_service->ctx, addr);
> - uint32_t current_status =
> - get_reg_field_value(
> - value,
> - HPD0_DC_HPD_INT_STATUS,
> - DC_HPD_SENSE_DELAYED);
> -
> - dal_irq_service_ack_generic(irq_service, info);
> -
> - value = dm_read_reg(irq_service->ctx, info->enable_reg);
> -
> - set_reg_field_value(
> - value,
> - current_status ? 0 : 1,
> - HPD0_DC_HPD_INT_CONTROL,
> - DC_HPD_INT_POLARITY);
> -
> - dm_write_reg(irq_service->ctx, info->enable_reg, value);
> -
> - return true;
> -}
> -
> static struct irq_source_info_funcs hpd_irq_info_funcs = {
> .set = NULL,
> - .ack = hpd_ack
> + .ack = hpd0_ack
> };
>
> static struct irq_source_info_funcs hpd_rx_irq_info_funcs = {
> diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c b/drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c
> index 42cdfe6c3538..71d2f065140b 100644
> --- a/drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c
> +++ b/drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c
> @@ -132,36 +132,9 @@ static enum dc_irq_source to_dal_irq_source_dcn21(struct irq_service *irq_servic
> return DC_IRQ_SOURCE_INVALID;
> }
>
> -static bool hpd_ack(
> - struct irq_service *irq_service,
> - const struct irq_source_info *info)
> -{
> - uint32_t addr = info->status_reg;
> - uint32_t value = dm_read_reg(irq_service->ctx, addr);
> - uint32_t current_status =
> - get_reg_field_value(
> - value,
> - HPD0_DC_HPD_INT_STATUS,
> - DC_HPD_SENSE_DELAYED);
> -
> - dal_irq_service_ack_generic(irq_service, info);
> -
> - value = dm_read_reg(irq_service->ctx, info->enable_reg);
> -
> - set_reg_field_value(
> - value,
> - current_status ? 0 : 1,
> - HPD0_DC_HPD_INT_CONTROL,
> - DC_HPD_INT_POLARITY);
> -
> - dm_write_reg(irq_service->ctx, info->enable_reg, value);
> -
> - return true;
> -}
> -
> static struct irq_source_info_funcs hpd_irq_info_funcs = {
> .set = NULL,
> - .ack = hpd_ack
> + .ack = hpd0_ack
> };
>
> static struct irq_source_info_funcs hpd_rx_irq_info_funcs = {
> diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c b/drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c
> index a443a8abb1ea..2a4080bdcf6b 100644
> --- a/drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c
> +++ b/drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c
> @@ -139,36 +139,9 @@ static enum dc_irq_source to_dal_irq_source_dcn30(
> }
> }
>
> -static bool hpd_ack(
> - struct irq_service *irq_service,
> - const struct irq_source_info *info)
> -{
> - uint32_t addr = info->status_reg;
> - uint32_t value = dm_read_reg(irq_service->ctx, addr);
> - uint32_t current_status =
> - get_reg_field_value(
> - value,
> - HPD0_DC_HPD_INT_STATUS,
> - DC_HPD_SENSE_DELAYED);
> -
> - dal_irq_service_ack_generic(irq_service, info);
> -
> - value = dm_read_reg(irq_service->ctx, info->enable_reg);
> -
> - set_reg_field_value(
> - value,
> - current_status ? 0 : 1,
> - HPD0_DC_HPD_INT_CONTROL,
> - DC_HPD_INT_POLARITY);
> -
> - dm_write_reg(irq_service->ctx, info->enable_reg, value);
> -
> - return true;
> -}
> -
> static struct irq_source_info_funcs hpd_irq_info_funcs = {
> .set = NULL,
> - .ack = hpd_ack
> + .ack = hpd0_ack
> };
>
> static struct irq_source_info_funcs hpd_rx_irq_info_funcs = {
> @@ -447,4 +420,3 @@ struct irq_service *dal_irq_service_dcn30_create(
> dcn30_irq_construct(irq_service, init_data);
> return irq_service;
> }
> -
> diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c b/drivers/gpu/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c
> index 8ffc7e2c681a..624f1ac309f8 100644
> --- a/drivers/gpu/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c
> +++ b/drivers/gpu/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c
> @@ -126,26 +126,9 @@ static enum dc_irq_source to_dal_irq_source_dcn302(struct irq_service *irq_servi
> }
> }
>
> -static bool hpd_ack(struct irq_service *irq_service, const struct irq_source_info *info)
> -{
> - uint32_t addr = info->status_reg;
> - uint32_t value = dm_read_reg(irq_service->ctx, addr);
> - uint32_t current_status = get_reg_field_value(value, HPD0_DC_HPD_INT_STATUS, DC_HPD_SENSE_DELAYED);
> -
> - dal_irq_service_ack_generic(irq_service, info);
> -
> - value = dm_read_reg(irq_service->ctx, info->enable_reg);
> -
> - set_reg_field_value(value, current_status ? 0 : 1, HPD0_DC_HPD_INT_CONTROL, DC_HPD_INT_POLARITY);
> -
> - dm_write_reg(irq_service->ctx, info->enable_reg, value);
> -
> - return true;
> -}
> -
> static struct irq_source_info_funcs hpd_irq_info_funcs = {
> .set = NULL,
> - .ack = hpd_ack
> + .ack = hpd0_ack
> };
>
> static struct irq_source_info_funcs hpd_rx_irq_info_funcs = {
> diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn303/irq_service_dcn303.c b/drivers/gpu/drm/amd/display/dc/irq/dcn303/irq_service_dcn303.c
> index 262bb8b74b15..137caffae916 100644
> --- a/drivers/gpu/drm/amd/display/dc/irq/dcn303/irq_service_dcn303.c
> +++ b/drivers/gpu/drm/amd/display/dc/irq/dcn303/irq_service_dcn303.c
> @@ -77,26 +77,9 @@ static enum dc_irq_source to_dal_irq_source_dcn303(struct irq_service *irq_servi
> }
> }
>
> -static bool hpd_ack(struct irq_service *irq_service, const struct irq_source_info *info)
> -{
> - uint32_t addr = info->status_reg;
> - uint32_t value = dm_read_reg(irq_service->ctx, addr);
> - uint32_t current_status = get_reg_field_value(value, HPD0_DC_HPD_INT_STATUS, DC_HPD_SENSE_DELAYED);
> -
> - dal_irq_service_ack_generic(irq_service, info);
> -
> - value = dm_read_reg(irq_service->ctx, info->enable_reg);
> -
> - set_reg_field_value(value, current_status ? 0 : 1, HPD0_DC_HPD_INT_CONTROL, DC_HPD_INT_POLARITY);
> -
> - dm_write_reg(irq_service->ctx, info->enable_reg, value);
> -
> - return true;
> -}
> -
> static struct irq_source_info_funcs hpd_irq_info_funcs = {
> .set = NULL,
> - .ack = hpd_ack
> + .ack = hpd0_ack
> };
>
> static struct irq_source_info_funcs hpd_rx_irq_info_funcs = {
> diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c b/drivers/gpu/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c
> index 53e78ae7eecf..921cb167d920 100644
> --- a/drivers/gpu/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c
> +++ b/drivers/gpu/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c
> @@ -128,36 +128,9 @@ static enum dc_irq_source to_dal_irq_source_dcn31(struct irq_service *irq_servic
> }
> }
>
> -static bool hpd_ack(
> - struct irq_service *irq_service,
> - const struct irq_source_info *info)
> -{
> - uint32_t addr = info->status_reg;
> - uint32_t value = dm_read_reg(irq_service->ctx, addr);
> - uint32_t current_status =
> - get_reg_field_value(
> - value,
> - HPD0_DC_HPD_INT_STATUS,
> - DC_HPD_SENSE_DELAYED);
> -
> - dal_irq_service_ack_generic(irq_service, info);
> -
> - value = dm_read_reg(irq_service->ctx, info->enable_reg);
> -
> - set_reg_field_value(
> - value,
> - current_status ? 0 : 1,
> - HPD0_DC_HPD_INT_CONTROL,
> - DC_HPD_INT_POLARITY);
> -
> - dm_write_reg(irq_service->ctx, info->enable_reg, value);
> -
> - return true;
> -}
> -
> static struct irq_source_info_funcs hpd_irq_info_funcs = {
> .set = NULL,
> - .ack = hpd_ack
> + .ack = hpd0_ack
> };
>
> static struct irq_source_info_funcs hpd_rx_irq_info_funcs = {
> diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c b/drivers/gpu/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c
> index e0563e880432..0118fd6e5db0 100644
> --- a/drivers/gpu/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c
> +++ b/drivers/gpu/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c
> @@ -130,36 +130,9 @@ static enum dc_irq_source to_dal_irq_source_dcn314(struct irq_service *irq_servi
> }
> }
>
> -static bool hpd_ack(
> - struct irq_service *irq_service,
> - const struct irq_source_info *info)
> -{
> - uint32_t addr = info->status_reg;
> - uint32_t value = dm_read_reg(irq_service->ctx, addr);
> - uint32_t current_status =
> - get_reg_field_value(
> - value,
> - HPD0_DC_HPD_INT_STATUS,
> - DC_HPD_SENSE_DELAYED);
> -
> - dal_irq_service_ack_generic(irq_service, info);
> -
> - value = dm_read_reg(irq_service->ctx, info->enable_reg);
> -
> - set_reg_field_value(
> - value,
> - current_status ? 0 : 1,
> - HPD0_DC_HPD_INT_CONTROL,
> - DC_HPD_INT_POLARITY);
> -
> - dm_write_reg(irq_service->ctx, info->enable_reg, value);
> -
> - return true;
> -}
> -
> static struct irq_source_info_funcs hpd_irq_info_funcs = {
> .set = NULL,
> - .ack = hpd_ack
> + .ack = hpd0_ack
> };
>
> static struct irq_source_info_funcs hpd_rx_irq_info_funcs = {
> diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c b/drivers/gpu/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c
> index 2ef22299101a..adebfc888618 100644
> --- a/drivers/gpu/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c
> +++ b/drivers/gpu/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c
> @@ -135,36 +135,9 @@ static enum dc_irq_source to_dal_irq_source_dcn315(
> }
> }
>
> -static bool hpd_ack(
> - struct irq_service *irq_service,
> - const struct irq_source_info *info)
> -{
> - uint32_t addr = info->status_reg;
> - uint32_t value = dm_read_reg(irq_service->ctx, addr);
> - uint32_t current_status =
> - get_reg_field_value(
> - value,
> - HPD0_DC_HPD_INT_STATUS,
> - DC_HPD_SENSE_DELAYED);
> -
> - dal_irq_service_ack_generic(irq_service, info);
> -
> - value = dm_read_reg(irq_service->ctx, info->enable_reg);
> -
> - set_reg_field_value(
> - value,
> - current_status ? 0 : 1,
> - HPD0_DC_HPD_INT_CONTROL,
> - DC_HPD_INT_POLARITY);
> -
> - dm_write_reg(irq_service->ctx, info->enable_reg, value);
> -
> - return true;
> -}
> -
> static struct irq_source_info_funcs hpd_irq_info_funcs = {
> .set = NULL,
> - .ack = hpd_ack
> + .ack = hpd0_ack
> };
>
> static struct irq_source_info_funcs hpd_rx_irq_info_funcs = {
> diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c b/drivers/gpu/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c
> index f839afacd5a5..e9e315c75d76 100644
> --- a/drivers/gpu/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c
> +++ b/drivers/gpu/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c
> @@ -129,36 +129,9 @@ static enum dc_irq_source to_dal_irq_source_dcn32(
> }
> }
>
> -static bool hpd_ack(
> - struct irq_service *irq_service,
> - const struct irq_source_info *info)
> -{
> - uint32_t addr = info->status_reg;
> - uint32_t value = dm_read_reg(irq_service->ctx, addr);
> - uint32_t current_status =
> - get_reg_field_value(
> - value,
> - HPD0_DC_HPD_INT_STATUS,
> - DC_HPD_SENSE_DELAYED);
> -
> - dal_irq_service_ack_generic(irq_service, info);
> -
> - value = dm_read_reg(irq_service->ctx, info->enable_reg);
> -
> - set_reg_field_value(
> - value,
> - current_status ? 0 : 1,
> - HPD0_DC_HPD_INT_CONTROL,
> - DC_HPD_INT_POLARITY);
> -
> - dm_write_reg(irq_service->ctx, info->enable_reg, value);
> -
> - return true;
> -}
> -
> static struct irq_source_info_funcs hpd_irq_info_funcs = {
> .set = NULL,
> - .ack = hpd_ack
> + .ack = hpd0_ack
> };
>
> static struct irq_source_info_funcs hpd_rx_irq_info_funcs = {
> diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c b/drivers/gpu/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c
> index ea8c271171bc..79e5e8c137ca 100644
> --- a/drivers/gpu/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c
> +++ b/drivers/gpu/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c
> @@ -127,36 +127,9 @@ static enum dc_irq_source to_dal_irq_source_dcn35(
> }
> }
>
> -static bool hpd_ack(
> - struct irq_service *irq_service,
> - const struct irq_source_info *info)
> -{
> - uint32_t addr = info->status_reg;
> - uint32_t value = dm_read_reg(irq_service->ctx, addr);
> - uint32_t current_status =
> - get_reg_field_value(
> - value,
> - HPD0_DC_HPD_INT_STATUS,
> - DC_HPD_SENSE_DELAYED);
> -
> - dal_irq_service_ack_generic(irq_service, info);
> -
> - value = dm_read_reg(irq_service->ctx, info->enable_reg);
> -
> - set_reg_field_value(
> - value,
> - current_status ? 0 : 1,
> - HPD0_DC_HPD_INT_CONTROL,
> - DC_HPD_INT_POLARITY);
> -
> - dm_write_reg(irq_service->ctx, info->enable_reg, value);
> -
> - return true;
> -}
> -
> static struct irq_source_info_funcs hpd_irq_info_funcs = {
> .set = NULL,
> - .ack = hpd_ack
> + .ack = hpd0_ack
> };
>
> static struct irq_source_info_funcs hpd_rx_irq_info_funcs = {
> diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c b/drivers/gpu/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c
> index 7ec8e0de2f01..163b8ee9ebf7 100644
> --- a/drivers/gpu/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c
> +++ b/drivers/gpu/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c
> @@ -106,36 +106,9 @@ static enum dc_irq_source to_dal_irq_source_dcn351(
> }
> }
>
> -static bool hpd_ack(
> - struct irq_service *irq_service,
> - const struct irq_source_info *info)
> -{
> - uint32_t addr = info->status_reg;
> - uint32_t value = dm_read_reg(irq_service->ctx, addr);
> - uint32_t current_status =
> - get_reg_field_value(
> - value,
> - HPD0_DC_HPD_INT_STATUS,
> - DC_HPD_SENSE_DELAYED);
> -
> - dal_irq_service_ack_generic(irq_service, info);
> -
> - value = dm_read_reg(irq_service->ctx, info->enable_reg);
> -
> - set_reg_field_value(
> - value,
> - current_status ? 0 : 1,
> - HPD0_DC_HPD_INT_CONTROL,
> - DC_HPD_INT_POLARITY);
> -
> - dm_write_reg(irq_service->ctx, info->enable_reg, value);
> -
> - return true;
> -}
> -
> static struct irq_source_info_funcs hpd_irq_info_funcs = {
> .set = NULL,
> - .ack = hpd_ack
> + .ack = hpd0_ack
> };
>
> static struct irq_source_info_funcs hpd_rx_irq_info_funcs = {
> diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c b/drivers/gpu/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c
> index ea958628f8b8..f716ab0fd30e 100644
> --- a/drivers/gpu/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c
> +++ b/drivers/gpu/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c
> @@ -105,36 +105,9 @@ static enum dc_irq_source to_dal_irq_source_dcn36(
> }
> }
>
> -static bool hpd_ack(
> - struct irq_service *irq_service,
> - const struct irq_source_info *info)
> -{
> - uint32_t addr = info->status_reg;
> - uint32_t value = dm_read_reg(irq_service->ctx, addr);
> - uint32_t current_status =
> - get_reg_field_value(
> - value,
> - HPD0_DC_HPD_INT_STATUS,
> - DC_HPD_SENSE_DELAYED);
> -
> - dal_irq_service_ack_generic(irq_service, info);
> -
> - value = dm_read_reg(irq_service->ctx, info->enable_reg);
> -
> - set_reg_field_value(
> - value,
> - current_status ? 0 : 1,
> - HPD0_DC_HPD_INT_CONTROL,
> - DC_HPD_INT_POLARITY);
> -
> - dm_write_reg(irq_service->ctx, info->enable_reg, value);
> -
> - return true;
> -}
> -
> static struct irq_source_info_funcs hpd_irq_info_funcs = {
> .set = NULL,
> - .ack = hpd_ack
> + .ack = hpd0_ack
> };
>
> static struct irq_source_info_funcs hpd_rx_irq_info_funcs = {
> diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c b/drivers/gpu/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c
> index 8499e505cf3e..fd9bb1950c20 100644
> --- a/drivers/gpu/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c
> +++ b/drivers/gpu/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c
> @@ -109,36 +109,9 @@ static enum dc_irq_source to_dal_irq_source_dcn401(
> }
> }
>
> -static bool hpd_ack(
> - struct irq_service *irq_service,
> - const struct irq_source_info *info)
> -{
> - uint32_t addr = info->status_reg;
> - uint32_t value = dm_read_reg(irq_service->ctx, addr);
> - uint32_t current_status =
> - get_reg_field_value(
> - value,
> - HPD0_DC_HPD_INT_STATUS,
> - DC_HPD_SENSE_DELAYED);
> -
> - dal_irq_service_ack_generic(irq_service, info);
> -
> - value = dm_read_reg(irq_service->ctx, info->enable_reg);
> -
> - set_reg_field_value(
> - value,
> - current_status ? 0 : 1,
> - HPD0_DC_HPD_INT_CONTROL,
> - DC_HPD_INT_POLARITY);
> -
> - dm_write_reg(irq_service->ctx, info->enable_reg, value);
> -
> - return true;
> -}
> -
> static struct irq_source_info_funcs hpd_irq_info_funcs = {
> .set = NULL,
> - .ack = hpd_ack
> + .ack = hpd0_ack
> };
>
> static struct irq_source_info_funcs hpd_rx_irq_info_funcs = {
> diff --git a/drivers/gpu/drm/amd/display/dc/irq/irq_service.c b/drivers/gpu/drm/amd/display/dc/irq/irq_service.c
> index eca3d7ee7e4e..fe593eba1246 100644
> --- a/drivers/gpu/drm/amd/display/dc/irq/irq_service.c
> +++ b/drivers/gpu/drm/amd/display/dc/irq/irq_service.c
> @@ -41,6 +41,15 @@
> #include "reg_helper.h"
> #include "irq_service.h"
>
> +#define HPD0_DC_HPD_INT_STATUS__DC_HPD_SENSE_DELAYED_MASK 0x00000010L
> +#define HPD0_DC_HPD_INT_CONTROL__DC_HPD_INT_POLARITY_MASK 0x00000100L
> +#define HPD0_DC_HPD_INT_STATUS__DC_HPD_SENSE_DELAYED__SHIFT 0x4
> +#define HPD0_DC_HPD_INT_CONTROL__DC_HPD_INT_POLARITY__SHIFT 0x8
> +
> +#define DC_HPD1_INT_STATUS__DC_HPD1_SENSE_DELAYED_MASK 0x10
> +#define DC_HPD1_INT_STATUS__DC_HPD1_SENSE_DELAYED__SHIFT 0x4
> +#define DC_HPD1_INT_CONTROL__DC_HPD1_INT_POLARITY_MASK 0x100
> +#define DC_HPD1_INT_CONTROL__DC_HPD1_INT_POLARITY__SHIFT 0x8
>
>
> #define CTX \
> @@ -177,3 +186,57 @@ enum dc_irq_source dal_irq_service_to_irq_source(
> src_id,
> ext_id);
> }
> +
> +bool hpd0_ack(
> + struct irq_service *irq_service,
> + const struct irq_source_info *info)
> +{
> + uint32_t addr = info->status_reg;
> + uint32_t value = dm_read_reg(irq_service->ctx, addr);
> + uint32_t current_status =
> + get_reg_field_value(
> + value,
> + HPD0_DC_HPD_INT_STATUS,
> + DC_HPD_SENSE_DELAYED);
> +
> + dal_irq_service_ack_generic(irq_service, info);
> +
> + value = dm_read_reg(irq_service->ctx, info->enable_reg);
> +
> + set_reg_field_value(
> + value,
> + current_status ? 0 : 1,
> + HPD0_DC_HPD_INT_CONTROL,
> + DC_HPD_INT_POLARITY);
> +
> + dm_write_reg(irq_service->ctx, info->enable_reg, value);
> +
> + return true;
> +}
> +
> +bool hpd1_ack(
> + struct irq_service *irq_service,
> + const struct irq_source_info *info)
> +{
> + uint32_t addr = info->status_reg;
> + uint32_t value = dm_read_reg(irq_service->ctx, addr);
> + uint32_t current_status =
> + get_reg_field_value(
> + value,
> + DC_HPD1_INT_STATUS,
> + DC_HPD1_SENSE_DELAYED);
> +
> + dal_irq_service_ack_generic(irq_service, info);
> +
> + value = dm_read_reg(irq_service->ctx, info->enable_reg);
> +
> + set_reg_field_value(
> + value,
> + current_status ? 0 : 1,
> + DC_HPD1_INT_CONTROL,
> + DC_HPD1_INT_POLARITY);
> +
> + dm_write_reg(irq_service->ctx, info->enable_reg, value);
> +
> + return true;
> +}
> diff --git a/drivers/gpu/drm/amd/display/dc/irq/irq_service.h b/drivers/gpu/drm/amd/display/dc/irq/irq_service.h
> index b178f85944cd..bbcef3d2fe33 100644
> --- a/drivers/gpu/drm/amd/display/dc/irq/irq_service.h
> +++ b/drivers/gpu/drm/amd/display/dc/irq/irq_service.h
> @@ -82,4 +82,12 @@ void dal_irq_service_set_generic(
> const struct irq_source_info *info,
> bool enable);
>
> +bool hpd0_ack(
> + struct irq_service *irq_service,
> + const struct irq_source_info *info);
> +
> +bool hpd1_ack(
> + struct irq_service *irq_service,
> + const struct irq_source_info *info);
> +
> #endif
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