[PATCH v5 19/24] drm/msm/dsi: Add support for SM8750
Dmitry Baryshkov
dmitry.baryshkov at oss.qualcomm.com
Mon May 5 12:26:55 UTC 2025
On Mon, May 05, 2025 at 08:45:01AM +0200, Krzysztof Kozlowski wrote:
> On 03/05/2025 00:52, Dmitry Baryshkov wrote:
> > On Wed, Apr 30, 2025 at 03:00:49PM +0200, Krzysztof Kozlowski wrote:
> >> Add support for DSI on Qualcomm SM8750 SoC with notable difference:
> >>
> >> DSI PHY PLLs, the parents of pixel and byte clocks, cannot be used as
> >> parents before DSI PHY is configured, the PLLs are prepared and their
> >> initial rate is set. Therefore assigned-clock-parents are not working
> >> here and driver is responsible for reparenting clocks with proper
> >> procedure: see dsi_clk_init_6g_v2_9().
> >
> > Is it still the case? I thought you've said that with the proper flags
>
> Yes, as we discussed many times - this is still needed even with the
> proper flags.
>
> > there would be no need to perform this in the driver.
>
> assigned-clock-xxx are not respecting that flag and anyway, even if that
This is really strange as the flag should be handled by the framework
itself.
> was solved, they are executed too early - before PHY is initialized. You
> cannot prepare PHY PLL before PHY is initialized and enabled.
Ack
--
With best wishes
Dmitry
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