[PATCH RFT v2 06/15] drm/msm/a6xx: Simplify uavflagprd_inv detection

[Dmitry Baryshkov]

On Wed, May 14, 2025 at 05:10:26PM +0200, Konrad Dybcio wrote:
> From: Konrad Dybcio <konrad.dybcio at oss.qualcomm.com>
> 
> Instead of setting it on a gpu-per-gpu basis, converge it to the
> intended "is A650 family or A7xx".
> 
> Signed-off-by: Konrad Dybcio <konrad.dybcio at oss.qualcomm.com>
> ---
>  drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 12 +++---------
>  1 file changed, 3 insertions(+), 9 deletions(-)
> 
> @@ -667,6 +660,7 @@ static int a6xx_calc_ubwc_config(struct adreno_gpu *gpu)
>  static void a6xx_set_ubwc_config(struct msm_gpu *gpu)
>  {
>  	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
> +	u8 uavflagprd_inv = adreno_is_a650_family(adreno_gpu) || adreno_is_a7xx(adreno_gpu) ? 2 : 0;

Nit: could you please move the assignment after the variable section? It
will be more readable this way. Or set it to 0 here and override later.

>  	const struct qcom_ubwc_cfg_data *cfg = adreno_gpu->common_ubwc_cfg;
>  	/*
>  	 * We subtract 13 from the highest bank bit (13 is the minimum value
> @@ -695,7 +689,7 @@ static void a6xx_set_ubwc_config(struct msm_gpu *gpu)
>  
>  	gpu_write(gpu, REG_A6XX_SP_NC_MODE_CNTL,
>  		  level2_swizzling_dis << 12 | hbb_hi << 10 |
> -		  adreno_gpu->ubwc_config.uavflagprd_inv << 4 |
> +		  uavflagprd_inv << 4 |
>  		  adreno_gpu->ubwc_config.min_acc_len << 3 |
>  		  hbb_lo << 1 | ubwc_mode);
>  
> 
> -- 
> 2.49.0
> 

-- 
With best wishes
Dmitry