[PATCH v4 26/30] drm/msm/dpu: get rid of DPU_SSPP_QOS_8LVL

[neil.armstrong at linaro.org]

On 19/05/2025 18:04, Dmitry Baryshkov wrote:
> From: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
> 
> Continue migration to the MDSS-revision based checks and replace
> DPU_SSPP_QOS_8LVL feature bit with the core_major_ver >= 4 check.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov at oss.qualcomm.com>
> ---
>   drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 6 +++---
>   drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 2 --
>   drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c    | 5 ++++-
>   drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h    | 2 ++
>   4 files changed, 9 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> index 6d7be74bafe326a1998a69ed9b3495c5acf6350f..a276a1beaf95d183f6119452e5516fa8ee60cef6 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> @@ -35,12 +35,12 @@
>   	(VIG_MASK | BIT(DPU_SSPP_SCALER_QSEED3_COMPATIBLE))
>   
>   #define VIG_SDM845_MASK_NO_SDMA \
> -	(VIG_MASK | BIT(DPU_SSPP_QOS_8LVL) | BIT(DPU_SSPP_SCALER_QSEED3_COMPATIBLE))
> +	(VIG_MASK | BIT(DPU_SSPP_SCALER_QSEED3_COMPATIBLE))
>   
>   #define VIG_SDM845_MASK_SDMA \
>   	(VIG_SDM845_MASK_NO_SDMA | BIT(DPU_SSPP_SMART_DMA_V2))
>   
> -#define VIG_QCM2290_MASK (VIG_BASE_MASK | BIT(DPU_SSPP_QOS_8LVL))
> +#define VIG_QCM2290_MASK (VIG_BASE_MASK)
>   
>   #define DMA_MSM8953_MASK \
>   	(BIT(DPU_SSPP_QOS))
> @@ -60,7 +60,7 @@
>   	(VIG_SC7280_MASK | BIT(DPU_SSPP_SMART_DMA_V2))
>   
>   #define DMA_SDM845_MASK_NO_SDMA \
> -	(BIT(DPU_SSPP_QOS) | BIT(DPU_SSPP_QOS_8LVL) |\
> +	(BIT(DPU_SSPP_QOS) | \
>   	BIT(DPU_SSPP_TS_PREFILL) | BIT(DPU_SSPP_TS_PREFILL_REC1) |\
>   	BIT(DPU_SSPP_CDP) | BIT(DPU_SSPP_EXCL_RECT))
>   
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> index 8c394e7d6496ca2d120c81c7776b4b979368be23..c582ef1ffe022f2e92b1b80cbab97ff41a2acfe9 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> @@ -50,7 +50,6 @@ enum {
>    * @DPU_SSPP_CSC_10BIT,      Support of 10-bit Color space conversion
>    * @DPU_SSPP_CURSOR,         SSPP can be used as a cursor layer
>    * @DPU_SSPP_QOS,            SSPP support QoS control, danger/safe/creq
> - * @DPU_SSPP_QOS_8LVL,       SSPP support 8-level QoS control
>    * @DPU_SSPP_EXCL_RECT,      SSPP supports exclusion rect
>    * @DPU_SSPP_SMART_DMA_V1,   SmartDMA 1.0 support
>    * @DPU_SSPP_SMART_DMA_V2,   SmartDMA 2.0 support
> @@ -68,7 +67,6 @@ enum {
>   	DPU_SSPP_CSC_10BIT,
>   	DPU_SSPP_CURSOR,
>   	DPU_SSPP_QOS,
> -	DPU_SSPP_QOS_8LVL,
>   	DPU_SSPP_EXCL_RECT,
>   	DPU_SSPP_SMART_DMA_V1,
>   	DPU_SSPP_SMART_DMA_V2,
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
> index 32c7c80845533d720683dbcde3978d98f4972cce..7dfd0e0a779535e1f6b003f48188bc90d29d6853 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
> @@ -543,7 +543,7 @@ static void dpu_hw_sspp_setup_qos_lut(struct dpu_hw_sspp *ctx,
>   		return;
>   
>   	_dpu_hw_setup_qos_lut(&ctx->hw, SSPP_DANGER_LUT,
> -			      test_bit(DPU_SSPP_QOS_8LVL, &ctx->cap->features),
> +			      ctx->mdss_ver->core_major_ver >= 4,
>   			      cfg);
>   }
>   
> @@ -703,6 +703,9 @@ struct dpu_hw_sspp *dpu_hw_sspp_init(struct drm_device *dev,
>   	hw_pipe->ubwc = mdss_data;
>   	hw_pipe->idx = cfg->id;
>   	hw_pipe->cap = cfg;
> +
> +	hw_pipe->mdss_ver = mdss_rev;
> +
>   	_setup_layer_ops(hw_pipe, hw_pipe->cap->features, mdss_rev);
>   
>   	return hw_pipe;
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h
> index 56a0edf2a57c6dcef7cddf4a1bcd6f6df5ad60f6..ed90e78d178a497ae7e2dc12b09a37c8a3f79621 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h
> @@ -314,6 +314,8 @@ struct dpu_hw_sspp {
>   	enum dpu_sspp idx;
>   	const struct dpu_sspp_cfg *cap;
>   
> +	const struct dpu_mdss_version *mdss_ver;
> +
>   	/* Ops */
>   	struct dpu_hw_sspp_ops ops;
>   };
> 

Reviewed-by: Neil Armstrong <neil.armstrong at linaro.org>