[PATCH] drm/amd/display: no 3D and blnd LUT as DPP color caps for DCN401

[Alex Hung]

Reviewed-by: Alex Hung <alex.hung at amd.com>

On 4/29/25 16:39, Melissa Wen wrote:
> 
> 
> On 25/04/2025 17:52, Melissa Wen wrote:
>> Match what is declared as DPP color caps with hw caps. DCN401 has MPC
>> shaper+3D+blnd LUTs that are movable before and after blending (get from
>> plane or stream), but no DPP shaper+3D+blend LUTs.
> Correction: shaper+3D LUTs movable, and no DPP blend LUT.
>>
>> Signed-off-by: Melissa Wen <mwen at igalia.com>
>> ---
>>   .../gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c  | 4 ++--
>>   1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn401/ 
>> dcn401_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn401/ 
>> dcn401_resource.c
>> index 5b7148bb1701..3b142e662c7b 100644
>> --- a/drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c
>> +++ b/drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c
>> @@ -1937,8 +1937,8 @@ static bool dcn401_resource_construct(
>>       dc->caps.color.dpp.gamma_corr = 1;
>>       dc->caps.color.dpp.dgam_rom_for_yuv = 0;
>> -    dc->caps.color.dpp.hw_3d_lut = 1;
>> -    dc->caps.color.dpp.ogam_ram = 1;
>> +    dc->caps.color.dpp.hw_3d_lut = 0;
>> +    dc->caps.color.dpp.ogam_ram = 0;
>>       // no OGAM ROM on DCN2 and later ASICs
>>       dc->caps.color.dpp.ogam_rom_caps.srgb = 0;
>>       dc->caps.color.dpp.ogam_rom_caps.bt2020 = 0;
>