[PATCH] drm/msm/dsi/dsi_phy_10nm: Fix missing initial VCO rate

[Dmitry Baryshkov]

On Wed, May 21, 2025 at 08:09:14AM +0200, Krzysztof Kozlowski wrote:
> On 20/05/2025 22:06, Dmitry Baryshkov wrote:
> > On Tue, May 20, 2025 at 01:13:26PM +0200, Krzysztof Kozlowski wrote:
> >> Driver unconditionally saves current state on first init in
> >> dsi_pll_10nm_init(), but does not save the VCO rate, only some of the
> >> divider registers.  The state is then restored during probe/enable via
> >> msm_dsi_phy_enable() -> msm_dsi_phy_pll_restore_state() ->
> >> dsi_10nm_pll_restore_state().
> >>
> >> Restoring calls dsi_pll_10nm_vco_set_rate() with
> >> pll_10nm->vco_current_rate=0, which basically overwrites existing rate of
> >> VCO and messes with clock hierarchy, by setting frequency to 0 to clock
> >> tree.  This makes anyway little sense - VCO rate was not saved, so
> >> should not be restored.
> >>
> >> If PLL was not configured configure it to minimum rate to avoid glitches
> >> and configuring entire in clock hierarchy to 0 Hz.
> >>
> >> Suggested-by: Dmitry Baryshkov <dmitry.baryshkov at oss.qualcomm.com>
> >> Link: https://lore.kernel.org/r/sz4kbwy5nwsebgf64ia7uq4ee7wbsa5uy3xmlqwcstsbntzcov@ew3dcyjdzmi2/
> >> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski at linaro.org>
> > 
> > Fixes?
> 
> Probably:
> Fixes: a4ccc37693a2 ("drm/msm/dsi_pll_10nm: restore VCO rate during
> restore_state")

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov at oss.qualcomm.com>

> But CC stable would not be appropriate, since this was never reproduced
> on this PHY/hardware and we only guess a visible issue being fixed here.

Agreed.

-- 
With best wishes
Dmitry