[PATCH v9 13/14] drm/msm/dpu: support plane splitting in quad-pipe case
Jun Nie
jun.nie at linaro.org
Fri May 23 10:21:32 UTC 2025
Jessica Zhang <quic_jesszhan at quicinc.com> 于2025年5月9日周五 05:24写道：
>
>
>
> On 5/6/2025 8:47 AM, Jun Nie wrote:
> > The content of every half of screen is sent out via one interface in
> > dual-DSI case. The content for every interface is blended by a LM
> > pair in quad-pipe case, thus a LM pair should not blend any content
> > that cross the half of screen in this case. Clip plane into pipes per
> > left and right half screen ROI if topology is quad pipe case.
> >
> > The clipped rectangle on every half of screen is futher handled by two
> > pipes if its width exceeds a limit for a single pipe.
> >
> > Signed-off-by: Jun Nie <jun.nie at linaro.org>
> > Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
> > ---
> > drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 11 +++
> > drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 2 +
> > drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 134 +++++++++++++++++++++---------
> > 3 files changed, 107 insertions(+), 40 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> > index f35cb1f7a7d2c2c63b4228bc47b85bb57cddbe6b..a56d68de219910a827830293e8ff24f4cdee74e4 100644
> > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> > @@ -1560,6 +1560,17 @@ int dpu_crtc_vblank(struct drm_crtc *crtc, bool en)
> > return 0;
> > }
> >
> > +/**
> > + * dpu_crtc_get_num_lm - Get mixer number in this CRTC pipeline
> > + * @state: Pointer to drm crtc state object
> > + */
> > +unsigned int dpu_crtc_get_num_lm(const struct drm_crtc_state *state)
> > +{
> > + struct dpu_crtc_state *cstate = to_dpu_crtc_state(state);
> > +
> > + return cstate->num_mixers;
> > +}
> > +
> > #ifdef CONFIG_DEBUG_FS
> > static int _dpu_debugfs_status_show(struct seq_file *s, void *data)
> > {
> > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h
> > index 94392b9b924546f96e738ae20920cf9afd568e6b..6eaba5696e8e6bd1246a9895c4c8714ca6589b10 100644
> > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h
> > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h
> > @@ -267,4 +267,6 @@ static inline enum dpu_crtc_client_type dpu_crtc_get_client_type(
> >
> > void dpu_crtc_frame_event_cb(struct drm_crtc *crtc, u32 event);
> >
> > +unsigned int dpu_crtc_get_num_lm(const struct drm_crtc_state *state);
> > +
> > #endif /* _DPU_CRTC_H_ */
> > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> > index de3f52d743e1d1f11ae8721a316b9872d4139069..cf2b4d5cb0ccc144c2cf8fd227c862b0b6e7725f 100644
> > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> > @@ -831,8 +831,12 @@ static int dpu_plane_atomic_check_nosspp(struct drm_plane *plane,
> > struct dpu_plane_state *pstate = to_dpu_plane_state(new_plane_state);
> > struct dpu_sw_pipe_cfg *pipe_cfg;
> > struct dpu_sw_pipe_cfg *r_pipe_cfg;
> > + struct dpu_sw_pipe_cfg init_pipe_cfg;
> > struct drm_rect fb_rect = { 0 };
> > + const struct drm_display_mode *mode = &crtc_state->adjusted_mode;
> > uint32_t max_linewidth;
> > + u32 num_lm;
> > + int stage_id, num_stages;
> >
> > min_scale = FRAC_16_16(1, MAX_UPSCALE_RATIO);
> > max_scale = MAX_DOWNSCALE_RATIO << 16;
> > @@ -855,13 +859,10 @@ static int dpu_plane_atomic_check_nosspp(struct drm_plane *plane,
> > return -EINVAL;
> > }
> >
> > - /* move the assignment here, to ease handling to another pairs later */
> > - pipe_cfg = &pstate->pipe_cfg[0];
> > - r_pipe_cfg = &pstate->pipe_cfg[1];
> > - /* state->src is 16.16, src_rect is not */
> > - drm_rect_fp_to_int(&pipe_cfg->src_rect, &new_plane_state->src);
> > + num_lm = dpu_crtc_get_num_lm(crtc_state);
> >
> > - pipe_cfg->dst_rect = new_plane_state->dst;
> > + /* state->src is 16.16, src_rect is not */
> > + drm_rect_fp_to_int(&init_pipe_cfg.src_rect, &new_plane_state->src);
> >
> > fb_rect.x2 = new_plane_state->fb->width;
> > fb_rect.y2 = new_plane_state->fb->height;
> > @@ -886,35 +887,91 @@ static int dpu_plane_atomic_check_nosspp(struct drm_plane *plane,
> >
> > max_linewidth = pdpu->catalog->caps->max_linewidth;
> >
> > - drm_rect_rotate(&pipe_cfg->src_rect,
> > + drm_rect_rotate(&init_pipe_cfg.src_rect,
> > new_plane_state->fb->width, new_plane_state->fb->height,
> > new_plane_state->rotation);
> >
> > - if ((drm_rect_width(&pipe_cfg->src_rect) > max_linewidth) ||
> > - _dpu_plane_calc_clk(&crtc_state->adjusted_mode, pipe_cfg) > max_mdp_clk_rate) {
> > - if (drm_rect_width(&pipe_cfg->src_rect) > 2 * max_linewidth) {
> > - DPU_DEBUG_PLANE(pdpu, "invalid src " DRM_RECT_FMT " line:%u\n",
> > - DRM_RECT_ARG(&pipe_cfg->src_rect), max_linewidth);
> > - return -E2BIG;
> > + /*
> > + * We have 1 mixer pair cfg for 1:1:1 and 2:2:1 topology, 2 mixer pair
> > + * configs for left and right half screen in case of 4:4:2 topology.
> > + * But we may have 2 rect to split wide plane that exceeds limit with 1
> > + * config for 2:2:1. So need to handle both wide plane splitting, and
> > + * two halves of screen splitting for quad-pipe case. Check dest
> > + * rectangle left/right clipping first, then check wide rectangle
> > + * splitting in every half next.
> > + */
> > + num_stages = (num_lm + 1) / 2;
> > + /* iterate mixer configs for this plane, to separate left/right with the id */
> > + for (stage_id = 0; stage_id < num_stages; stage_id++) {
> > + struct drm_rect mixer_rect = {stage_id * mode->hdisplay / num_stages, 0,
> > + (stage_id + 1) * mode->hdisplay / num_stages,
> > + mode->vdisplay};
>
> Hi Jun,
>
> Nit: can you specify the fields when initializing the drm_rect struct here?
>
> e.g.:
>
> mixer_rect = {
> .x1 = ...,
> .y1 = ...
> ...
> }
>
Will do.
> > + int cfg_idx = stage_id * PIPES_PER_STAGE;
> > +
> > + pipe_cfg = &pstate->pipe_cfg[cfg_idx];
> > + r_pipe_cfg = &pstate->pipe_cfg[cfg_idx + 1];
> > +
> > + drm_rect_fp_to_int(&pipe_cfg->src_rect, &new_plane_state->src);
> > + pipe_cfg->dst_rect = new_plane_state->dst;
> > +
> > + DPU_DEBUG_PLANE(pdpu, "checking src " DRM_RECT_FMT
> > + " vs clip window " DRM_RECT_FMT "\n",
> > + DRM_RECT_ARG(&pipe_cfg->src_rect),
> > + DRM_RECT_ARG(&mixer_rect));
> > +
> > + /*
> > + * If this plane does not fall into mixer rect, check next
> > + * mixer rect.
> > + */
> > + if (!drm_rect_clip_scaled(&pipe_cfg->src_rect,
> > + &pipe_cfg->dst_rect,
> > + &mixer_rect)) {
> > + memset(pipe_cfg, 0, 2 * sizeof(struct dpu_sw_pipe_cfg));
> > +
> > + continue;
> > }
> >
> > - *r_pipe_cfg = *pipe_cfg;
> > - pipe_cfg->src_rect.x2 = (pipe_cfg->src_rect.x1 + pipe_cfg->src_rect.x2) >> 1;
> > - pipe_cfg->dst_rect.x2 = (pipe_cfg->dst_rect.x1 + pipe_cfg->dst_rect.x2) >> 1;
> > - r_pipe_cfg->src_rect.x1 = pipe_cfg->src_rect.x2;
> > - r_pipe_cfg->dst_rect.x1 = pipe_cfg->dst_rect.x2;
> > - } else {
> > - memset(r_pipe_cfg, 0, sizeof(*r_pipe_cfg));
> > - }
> > + pipe_cfg->dst_rect.x1 -= mixer_rect.x1;
> > + pipe_cfg->dst_rect.x2 -= mixer_rect.x1;
> > +
> > + DPU_DEBUG_PLANE(pdpu, "Got clip src:" DRM_RECT_FMT " dst: " DRM_RECT_FMT "\n",
> > + DRM_RECT_ARG(&pipe_cfg->src_rect), DRM_RECT_ARG(&pipe_cfg->dst_rect));
> >
> > - drm_rect_rotate_inv(&pipe_cfg->src_rect,
> > - new_plane_state->fb->width, new_plane_state->fb->height,
> > - new_plane_state->rotation);
> > - if (drm_rect_width(&r_pipe_cfg->src_rect) != 0)
> > - drm_rect_rotate_inv(&r_pipe_cfg->src_rect,
> > - new_plane_state->fb->width, new_plane_state->fb->height,
> > + /* Split wide rect into 2 rect */
> > + if ((drm_rect_width(&pipe_cfg->src_rect) > max_linewidth) ||
> > + _dpu_plane_calc_clk(mode, pipe_cfg) > max_mdp_clk_rate) {
> > +
> > + if (drm_rect_width(&pipe_cfg->src_rect) > 2 * max_linewidth) {
> > + DPU_DEBUG_PLANE(pdpu, "invalid src " DRM_RECT_FMT " line:%u\n",
> > + DRM_RECT_ARG(&pipe_cfg->src_rect), max_linewidth);
> > + return -E2BIG;
> > + }
> > +
> > + memcpy(r_pipe_cfg, pipe_cfg, sizeof(struct dpu_sw_pipe_cfg));
> > + pipe_cfg->src_rect.x2 = (pipe_cfg->src_rect.x1 + pipe_cfg->src_rect.x2) >> 1;
> > + pipe_cfg->dst_rect.x2 = (pipe_cfg->dst_rect.x1 + pipe_cfg->dst_rect.x2) >> 1;
> > + r_pipe_cfg->src_rect.x1 = pipe_cfg->src_rect.x2;
> > + r_pipe_cfg->dst_rect.x1 = pipe_cfg->dst_rect.x2;
> > + DPU_DEBUG_PLANE(pdpu, "Split wide plane into:"
> > + DRM_RECT_FMT " and " DRM_RECT_FMT "\n",
> > + DRM_RECT_ARG(&pipe_cfg->src_rect),
> > + DRM_RECT_ARG(&r_pipe_cfg->src_rect));
> > + } else {
> > + memset(r_pipe_cfg, 0, sizeof(struct dpu_sw_pipe_cfg));
> > + }
> > +
> > + drm_rect_rotate_inv(&pipe_cfg->src_rect,
> > + new_plane_state->fb->width,
> > + new_plane_state->fb->height,
> > new_plane_state->rotation);
> >
> > + if (drm_rect_width(&r_pipe_cfg->src_rect) != 0)
> > + drm_rect_rotate_inv(&r_pipe_cfg->src_rect,
> > + new_plane_state->fb->width,
> > + new_plane_state->fb->height,
> > + new_plane_state->rotation);
> > + }
> > +
> > pstate->needs_qos_remap = drm_atomic_crtc_needs_modeset(crtc_state);
> >
> > return 0;
> > @@ -954,20 +1011,17 @@ static int dpu_plane_atomic_check_sspp(struct drm_plane *plane,
> > drm_atomic_get_new_plane_state(state, plane);
> > struct dpu_plane *pdpu = to_dpu_plane(plane);
> > struct dpu_plane_state *pstate = to_dpu_plane_state(new_plane_state);
> > - struct dpu_sw_pipe *pipe = &pstate->pipe[0];
> > - struct dpu_sw_pipe *r_pipe = &pstate->pipe[1];
> > - struct dpu_sw_pipe_cfg *pipe_cfg = &pstate->pipe_cfg[0];
> > - struct dpu_sw_pipe_cfg *r_pipe_cfg = &pstate->pipe_cfg[1];
> > - int ret = 0;
> > -
> > - ret = dpu_plane_atomic_check_pipe(pdpu, pipe, pipe_cfg,
> > - &crtc_state->adjusted_mode,
> > - new_plane_state);
> > - if (ret)
> > - return ret;
> > + struct dpu_sw_pipe *pipe;
> > + struct dpu_sw_pipe_cfg *pipe_cfg;
> > + int ret = 0, i;
> >
> > - if (drm_rect_width(&r_pipe_cfg->src_rect) != 0) {
>
> Any reason why this check was dropped?
>
> Thanks,
>
> Jessica Zhang
Because we have a pipe array now and will loop on it, not just the 2nd pipe.
It is converted to below 2 lines, as sspp is assigned only for valid pipe.
+ if (!pipe->sspp)
+ continue;
>
> > - ret = dpu_plane_atomic_check_pipe(pdpu, r_pipe, r_pipe_cfg,
> > + for (i = 0; i < PIPES_PER_PLANE; i++) {
> > + pipe = &pstate->pipe[i];
> > + pipe_cfg = &pstate->pipe_cfg[i];
> > + if (!pipe->sspp)
> > + continue;
> > + DPU_DEBUG_PLANE(pdpu, "pipe %d is in use, validate it\n", i);
> > + ret = dpu_plane_atomic_check_pipe(pdpu, pipe, pipe_cfg,
> > &crtc_state->adjusted_mode,
> > new_plane_state);
> > if (ret)
> >
>
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