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    <body><table border="1" cellspacing="0" cellpadding="8">
        <tr>
          <th>Bug ID</th>
          <td><a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - [bisected] Kernel oops on startup"
   href="https://bugs.freedesktop.org/show_bug.cgi?id=100304">100304</a>
          </td>
        </tr>

        <tr>
          <th>Summary</th>
          <td>[bisected] Kernel oops on startup
          </td>
        </tr>

        <tr>
          <th>Product</th>
          <td>DRI
          </td>
        </tr>

        <tr>
          <th>Version</th>
          <td>DRI git
          </td>
        </tr>

        <tr>
          <th>Hardware</th>
          <td>Other
          </td>
        </tr>

        <tr>
          <th>OS</th>
          <td>All
          </td>
        </tr>

        <tr>
          <th>Status</th>
          <td>NEW
          </td>
        </tr>

        <tr>
          <th>Severity</th>
          <td>normal
          </td>
        </tr>

        <tr>
          <th>Priority</th>
          <td>medium
          </td>
        </tr>

        <tr>
          <th>Component</th>
          <td>DRM/AMDgpu
          </td>
        </tr>

        <tr>
          <th>Assignee</th>
          <td>dri-devel@lists.freedesktop.org
          </td>
        </tr>

        <tr>
          <th>Reporter</th>
          <td>mike@fireburn.co.uk
          </td>
        </tr></table>
      <p>
        <div>
        <pre>Created <span class=""><a href="attachment.cgi?id=130353" name="attach_130353" title="Screen shot">attachment 130353</a> <a href="attachment.cgi?id=130353&action=edit" title="Screen shot">[details]</a></span>
Screen shot

Bisected back to:

2d38d25554b739b50eec254205f769580751fb02 is the first bad commit
commit 2d38d25554b739b50eec254205f769580751fb02
Author: David Panariti <<a href="mailto:David.Panariti@amd.com">David.Panariti@amd.com</a>>
Date:   Mon Mar 13 13:33:18 2017 -0400

    drm/amdgpu: Switch baremetal to use KIQ for compute ring management.

    KIQ is the Kernel Interface Queue for managing the MEC.  Rather than
setting
    up rings via direct MMIO of ring registers, the rings are configured via
    special packets sent to the KIQ.  The allows the MEC to better manage
shared
    resources and certain power events.

    Signed-off-by: David Panariti <<a href="mailto:David.Panariti@amd.com">David.Panariti@amd.com</a>>
    Reviewed-by: Alex Deucher <<a href="mailto:alexander.deucher@amd.com">alexander.deucher@amd.com</a>>
    Acked-by: Tom St Denis <<a href="mailto:tom.stdenis@amd.com">tom.stdenis@amd.com</a>>
    Signed-off-by: Alex Deucher <<a href="mailto:alexander.deucher@amd.com">alexander.deucher@amd.com</a></pre>
        </div>
      </p>


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