<div dir="ltr"><br><div class="gmail_extra"><br><div class="gmail_quote">On Mon, May 15, 2017 at 4:07 PM, Pandiyan, Dhinakaran <span dir="ltr"><<a href="mailto:dhinakaran.pandiyan@intel.com" target="_blank" class="gmail-cremed gmail-cremed gmail-cremed gmail-cremed cremed">dhinakaran.pandiyan@intel.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex"><div class="gmail-HOEnZb"><div class="gmail-h5">On Fri, 2017-05-12 at 17:31 -0700, Puthikorn Voravootivat wrote:<br>
><br>
><br>
><br>
> On Fri, May 12, 2017 at 5:12 PM, Pandiyan, Dhinakaran<br>
> <<a href="mailto:dhinakaran.pandiyan@intel.com" class="gmail-cremed gmail-cremed gmail-cremed gmail-cremed cremed">dhinakaran.pandiyan@intel.com</a><wbr>> wrote:<br>
>         On Thu, 2017-05-11 at 16:02 -0700, Puthikorn Voravootivat<br>
>         wrote:<br>
>         > Read desired PWM frequency from panel vbt and calculate the<br>
>         > value for divider in DPCD address 0x724 and 0x728 to have<br>
>         > as many bits as possible for PWM duty cyle for granularity<br>
>         of<br>
>         > brightness adjustment while the frequency is still within<br>
>         25%<br>
>         > of the desired frequency.<br>
><br>
>         I read a few eDP panel data sheets, the PWM frequencies all<br>
>         start from<br>
>         ~200Hz. If the VBT chooses this lowest value to allow for more<br>
>         brightness control, and then this patch lowers the value by<br>
>         another 25%,<br>
>         we'll end up below the panel allowed PWM frequency.<br>
><br>
>         In fact, one of the systems I checked had PWM frequency as<br>
>         200Hz in VBT<br>
>         and the panel datasheet also had PWM frequency range starting<br>
>         from<br>
>         200Hz. Have you considered this case?<br>
><br>
> The spec said "A given LCD panel typically has a limited range of<br>
> backlight frequency capability.<br>
> To limit the programmable frequency range, limitations are placed on<br>
> the allowable total divider ratio with the Sink device"<br>
>  So I think it should be auto cap to 200Hz in this case.<br>
><br>
>         -DK<br>
>         ><br>
>         > Signed-off-by: Puthikorn Voravootivat <<a href="mailto:puthik@chromium.org" class="gmail-cremed gmail-cremed gmail-cremed gmail-cremed cremed">puthik@chromium.org</a>><br>
>         > ---<br>
>         >  drivers/gpu/drm/i915/intel_dp_<wbr>aux_backlight.c | 81<br>
>         +++++++++++++++++++++++++++<br>
>         >  1 file changed, 81 insertions(+)<br>
>         ><br>
>         > diff --git a/drivers/gpu/drm/i915/intel_<wbr>dp_aux_backlight.c<br>
>         b/drivers/gpu/drm/i915/intel_<wbr>dp_aux_backlight.c<br>
>         > index 0b48851013cc..6f10a2f1ab76 100644<br>
>         > --- a/drivers/gpu/drm/i915/intel_<wbr>dp_aux_backlight.c<br>
>         > +++ b/drivers/gpu/drm/i915/intel_<wbr>dp_aux_backlight.c<br>
>         > @@ -113,12 +113,86 @@<br>
>         intel_dp_aux_set_dynamic_<wbr>backlight_percent(struct intel_dp<br>
>         *intel_dp,<br>
>         >       }<br>
>         >  }<br>
>         ><br>
>         > +/*<br>
>         > + * Set PWM Frequency divider to match desired frequency in<br>
>         vbt.<br>
>         > + * The PWM Frequency is calculated as 27Mhz / (F x P).<br>
>         > + * - Where F = PWM Frequency Pre-Divider value programmed<br>
>         by field 7:0 of the<br>
>         > + *             EDP_BACKLIGHT_FREQ_SET register (DPCD<br>
>         Address 00728h)<br>
>         > + * - Where P = 2^Pn, where Pn is the value programmed by<br>
>         field 4:0 of the<br>
>         > + *             EDP_PWMGEN_BIT_COUNT register (DPCD Address<br>
>         00724h)<br>
>         > + */<br>
>         > +static void intel_dp_aux_set_pwm_freq(<wbr>struct<br>
>         intel_connector *connector)<br>
>         > +{<br>
>         > +     struct drm_i915_private *dev_priv =<br>
>         to_i915(connector->base.dev);<br>
>         > +     struct intel_dp *intel_dp =<br>
>         enc_to_intel_dp(&connector-><wbr>encoder->base);<br>
>         > +     int freq, fxp, fxp_min, fxp_max, fxp_actual, f = 1;<br>
>         > +     u8 pn, pn_min, pn_max;<br>
>         > +<br>
>         > +     /* Find desired value of (F x P)<br>
>         > +      * Note that, if F x P is out of supported range, the<br>
>         maximum value or<br>
>         > +      * minimum value will applied automatically. So no<br>
>         need to check that.<br>
>         > +      */<br>
>         > +     freq = dev_priv->vbt.backlight.pwm_<wbr>freq_hz;<br>
>         > +     DRM_DEBUG_KMS("VBT defined backlight frequency %u Hz<br>
>         \n", freq);<br>
>         > +     if (!freq) {<br>
>         > +             DRM_DEBUG_KMS("Use panel default backlight<br>
>         frequency\n");<br>
>         > +             return;<br>
>         > +     }<br>
>         > +<br>
>         > +     fxp = KHz(DP_EDP_BACKLIGHT_FREQ_<wbr>BASE_KHZ) / freq;<br>
>         > +<br>
>         > +     /* Use highest possible value of Pn for more<br>
>         granularity of brightness<br>
>         > +      * adjustment while satifying the conditions below.<br>
>         > +      * - Pn is in the range of Pn_min and Pn_max<br>
>         > +      * - F is in the range of 1 and 255<br>
>         > +      * - Effective frequency is within 25% of desired<br>
>         frequency.<br>
>         > +      */<br>
>         > +     if (drm_dp_dpcd_readb(&intel_dp-><wbr>aux,<br>
>         > +<br>
>         DP_EDP_PWMGEN_BIT_COUNT_CAP_<wbr>MIN, &pn_min) != 1) {<br>
>         > +             DRM_DEBUG_KMS("Failed to read pwmgen bit count<br>
>         cap min\n");<br>
>         > +             return;<br>
>         > +     }<br>
>         > +     if (drm_dp_dpcd_readb(&intel_dp-><wbr>aux,<br>
>         > +<br>
>         DP_EDP_PWMGEN_BIT_COUNT_CAP_<wbr>MAX, &pn_max) != 1) {<br>
>         > +             DRM_DEBUG_KMS("Failed to read pwmgen bit count<br>
>         cap max\n");<br>
>         > +             return;<br>
>         > +     }<br>
>         > +     pn_min &= DP_EDP_PWMGEN_BIT_COUNT_MASK;<br>
>         > +     pn_max &= DP_EDP_PWMGEN_BIT_COUNT_MASK;<br>
>         > +<br>
>         > +     fxp_min = fxp * 3 / 4;<br>
>         > +     fxp_max = fxp * 5 / 4;<br>
><br>
><br>
>         You are allowing fxp between +/- 25% of the actual. This isn't<br>
>         same as<br>
>         the "Effective frequency is within 25% of desired frequency."<br>
>         right? The<br>
>         frequency can vary between -20% and +33%.<br>
><br>
><br>
> You are right.<br>
> You want me to change commit message to reflect this or change the<br>
> code to<br>
> match the commit message?<br>
<br>
</div></div>I am okay with fixing the comment and commit message. Is the 25%<br>
arbitrary or based on the distances between the possible values? Please<br>
make a note in the comment if it's the former.<br>
<span class="gmail-"><br>
<br>
>         > +     if (fxp_min < (1 << pn_min) || (255 << pn_max) <<br>
>         fxp_max) {<br>
<br>
<br>
<br>
>         > +             DRM_DEBUG_KMS("VBT defined backlight frequency<br>
>         out of range\n");<br>
>         > +             return;<br>
>         > +     }<br>
>         > +<br>
>         > +     for (pn = pn_max; pn > pn_min; pn--) {<br>
<br>
</span>Is there a reason this is not pn >= pn_min?<br></blockquote><div>This is bug because f value will be incorrect in the case that pn == pn_min.</div><div>Thanks for catching this.</div><div> </div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex"><span class="gmail-">
<br>
>         > +             f = clamp(fxp >> pn, 1, 255);<br>
>         > +             fxp_actual = f << pn;<br>
>         > +             if (fxp_min <= fxp_actual && fxp_actual <=<br>
>         fxp_max)<br>
>         > +                     break;<br>
>         > +     }<br>
>         > +<br>
>         > +     if (drm_dp_dpcd_writeb(&intel_dp-<wbr>>aux,<br>
>         > +                            DP_EDP_PWMGEN_BIT_COUNT, pn) <<br>
>         0) {<br>
>         > +             DRM_DEBUG_KMS("Failed to write aux pwmgen bit<br>
>         count\n");<br>
<br>
<br>
</span>If the number of brightness control bits are changing, the max.<br>
brightness value changes too.<br>
<br>
Please see intel_dp_aux_setup_backlight()<wbr>.<br>
<div><div class="gmail-h5"><br></div></div></blockquote><div>I think this is fine because</div><div>- intel_dp_aux_setup_backlight() will called intel_dp_aux_enable_backlight() which </div><div>called intel_dp_aux_set_pwm_freq() first before determine the max brightness value.</div><div>- Also, the panel I tested does not change BACKLIGHT_BRIGHTNESS_BYTE_COUNT<br></div><div>when changing the frequency. </div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex"><div><div class="gmail-h5">
<br>
<br>
>         > +             return;<br>
>         > +     }<br>
>         > +     if (drm_dp_dpcd_writeb(&intel_dp-<wbr>>aux,<br>
>         > +                            DP_EDP_BACKLIGHT_FREQ_SET, (u8)<br>
>         f) < 0) {<br>
>         > +             DRM_DEBUG_KMS("Failed to write aux backlight<br>
>         freq\n");<br>
>         > +             return;<br>
>         > +     }<br>
>         > +}<br>
>         > +<br>
>         >  static void intel_dp_aux_enable_backlight(<wbr>struct<br>
>         intel_connector *connector)<br>
>         >  {<br>
>         >       struct intel_dp *intel_dp =<br>
>         enc_to_intel_dp(&connector-><wbr>encoder->base);<br>
>         >       uint8_t dpcd_buf = 0;<br>
>         >       uint8_t new_dpcd_buf = 0;<br>
>         >       uint8_t edp_backlight_mode = 0;<br>
>         > +     bool freq_cap;<br>
>         ><br>
>         >       if (drm_dp_dpcd_readb(&intel_dp-><wbr>aux,<br>
>         >                       DP_EDP_BACKLIGHT_MODE_SET_<wbr>REGISTER,<br>
>         &dpcd_buf) != 1) {<br>
>         > @@ -151,6 +225,10 @@ static void<br>
>         intel_dp_aux_enable_backlight(<wbr>struct intel_connector<br>
>         *connector)<br>
>         >               DRM_DEBUG_KMS("Enable dynamic brightness.\n");<br>
>         >       }<br>
>         ><br>
>         > +     freq_cap = intel_dp->edp_dpcd[2] &<br>
>         DP_EDP_BACKLIGHT_FREQ_AUX_SET_<wbr>CAP;<br>
>         > +     if (freq_cap)<br>
>         > +             new_dpcd_buf |=<br>
>         DP_EDP_BACKLIGHT_FREQ_AUX_SET_<wbr>ENABLE;<br>
>         > +<br>
>         >       if (new_dpcd_buf != dpcd_buf) {<br>
>         >               if (drm_dp_dpcd_writeb(&intel_dp-<wbr>>aux,<br>
>         >                       DP_EDP_BACKLIGHT_MODE_SET_<wbr>REGISTER,<br>
>         new_dpcd_buf) < 0) {<br>
>         > @@ -158,6 +236,9 @@ static void<br>
>         intel_dp_aux_enable_backlight(<wbr>struct intel_connector<br>
>         *connector)<br>
>         >               }<br>
>         >       }<br>
>         ><br>
>         > +     if (freq_cap)<br>
>         > +             intel_dp_aux_set_pwm_freq(<wbr>connector);<br>
>         > +<br>
>         >       set_aux_backlight_enable(<wbr>intel_dp, true);<br>
>         >       intel_dp_aux_set_backlight(<wbr>connector,<br>
>         connector->panel.backlight.<wbr>level);<br>
>         >  }<br>
><br>
><br>
><br>
><br>
</div></div>> ______________________________<wbr>_________________<br>
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<br>
</blockquote></div><br></div></div>