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<b><a class="bz_bug_link
bz_status_NEW "
title="NEW - New GPU sysfs Power State Interface for custom pp_od_clk_voltage"
href="https://bugs.freedesktop.org/show_bug.cgi?id=110208#c1">Comment # 1</a>
on <a class="bz_bug_link
bz_status_NEW "
title="NEW - New GPU sysfs Power State Interface for custom pp_od_clk_voltage"
href="https://bugs.freedesktop.org/show_bug.cgi?id=110208">bug 110208</a>
from <span class="vcard"><a class="email" href="mailto:richard.llom@gmail.com" title="famo <richard.llom@gmail.com>"> <span class="fn">famo</span></a>
</span></b>
<pre>Link to documentation:
<a href="https://dri.freedesktop.org/docs/drm/gpu/amdgpu.html#power-dpm-force-performance-level">https://dri.freedesktop.org/docs/drm/gpu/amdgpu.html#power-dpm-force-performance-level</a>
Quote:
pp_od_clk_voltage
The amdgpu driver provides a sysfs API for adjusting the clocks and voltages in
each power level within a power state. The pp_od_clk_voltage is used for this.
< For Vega10 and previous ASICs >
Reading the file will display:
a list of engine clock levels and voltages labeled OD_SCLK
a list of memory clock levels and voltages labeled OD_MCLK
a list of valid ranges for sclk, mclk, and voltage labeled OD_RANGE
To manually adjust these settings, first select manual using
power_dpm_force_performance_level. ...</pre>
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