<html xmlns:o="urn:schemas-microsoft-com:office:office" xmlns:w="urn:schemas-microsoft-com:office:word" xmlns:m="http://schemas.microsoft.com/office/2004/12/omml" xmlns="http://www.w3.org/TR/REC-html40"><head><meta http-equiv=Content-Type content="text/html; charset=utf-8"><meta name=Generator content="Microsoft Word 15 (filtered medium)"><style></style></head><body lang=EN-US link=blue vlink="#954F72"><div class=WordSection1><o:p> </o:p><o:p> </o:p><div style='mso-element:para-border-div;border:none;border-top:solid #E1E1E1 1.0pt;padding:3.0pt 0in 0in 0in'>From: <a href="mailto:dianders@chromium.org">Douglas Anderson</a> Sent: Friday, October 2, 2020 4:04 PM To: <a href="mailto:a.hajda@samsung.com">Andrzej Hajda</a>; <a href="mailto:narmstrong@baylibre.com">Neil Armstrong</a>; <a href="mailto:sam@ravnborg.org">Sam Ravnborg</a> Cc: <a href="mailto:robdclark@chromium.org">Rob Clark</a>; <a href="mailto:bjorn.andersson@linaro.org">Bjorn Andersson</a>; <a href="mailto:steev@kali.org">Steev Klimaszewski</a>; <a href="mailto:dianders@chromium.org">Douglas Anderson</a>; <a href="mailto:daniel@ffwll.ch">Daniel Vetter</a>; <a href="mailto:airlied@linux.ie">David Airlie</a>; <a href="mailto:jernej.skrabec@siol.net">Jernej Skrabec</a>; <a href="mailto:jonas@kwiboo.se">Jonas Karlman</a>; <a href="mailto:Laurent.pinchart@ideasonboard.com">Laurent Pinchart</a>; <a href="mailto:dri-devel@lists.freedesktop.org">dri-devel@lists.freedesktop.org</a>; <a href="mailto:linux-kernel@vger.kernel.org">linux-kernel@vger.kernel.org</a> Subject: [PATCH] drm/bridge: ti-sn65dsi86: Add retries for link training</div><o:p> </o:p>On some panels hooked up to the ti-sn65dsi86 bridge chip we found thatlink training was failing. Specifically, we'd see:<o:p> </o:p> ti_sn65dsi86 2-002d: [drm:ti_sn_bridge_enable] *ERROR* Link training failed, link is off (-5)<o:p> </o:p>The panel was hooked up to a logic analyzer and it was found that, aspart of link training, the bridge chip was writing a 0x1 to DPCDaddress 00600h and the panel responded NACK. As can be seen in headerfiles, the write of 0x1 to DPCD address 0x600h means we were trying towrite the value DP_SET_POWER_D0 to the register DP_SET_POWER. Thepanel vendor says that a NACK in this case is not unexpected and means"not ready, try again".<o:p> </o:p>In testing, we found that this panel would respond with a NACK inabout 1/25 times. Adding the retry logic worked fine and the mostnumber of tries needed was 3. Just to be safe, we'll add 10 trieshere and we'll add a little blurb to the logs if we ever need morethan 5.<o:p> </o:p>Signed-off-by: Douglas Anderson <dianders@chromium.org>---<o:p> </o:p> drivers/gpu/drm/bridge/ti-sn65dsi86.c | 40 +++++++++++++++++++-------- 1 file changed, 29 insertions(+), 11 deletions(-)<o:p> </o:p>diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c b/drivers/gpu/drm/bridge/ti-sn65dsi86.cindex ecdf9b01340f..6e12cda69b54 100644--- a/drivers/gpu/drm/bridge/ti-sn65dsi86.c+++ b/drivers/gpu/drm/bridge/ti-sn65dsi86.c@@ -106,6 +106,8 @@ #define SN_NUM_GPIOS 4 #define SN_GPIO_PHYSICAL_OFFSET 1 +#define SN_LINK_TRAINING_TRIES 10+ /** * struct ti_sn_bridge - Platform data for ti-sn65dsi86 driver. * @dev: Pointer to our device.@@ -673,6 +675,7 @@ static int ti_sn_link_training(struct ti_sn_bridge *pdata, int dp_rate_idx, { unsigned int val; int ret;+ int i; /* set dp clk frequency value */ regmap_update_bits(pdata->regmap, SN_DATARATE_CONFIG_REG,@@ -689,19 +692,34 @@ static int ti_sn_link_training(struct ti_sn_bridge *pdata, int dp_rate_idx, goto exit; } - /* Semi auto link training mode */- regmap_write(pdata->regmap, SN_ML_TX_MODE_REG, 0x0A);- ret = regmap_read_poll_timeout(pdata->regmap, SN_ML_TX_MODE_REG, val,- val == ML_TX_MAIN_LINK_OFF ||- val == ML_TX_NORMAL_MODE, 1000,- 500 * 1000);- if (ret) {- *last_err_str = "Training complete polling failed";- } else if (val == ML_TX_MAIN_LINK_OFF) {- *last_err_str = "Link training failed, link is off";- ret = -EIO;+ /*+ * We'll try to link train several times. As part of link training+ * the bridge chip will write DP_SET_POWER_D0 to DP_SET_POWER. If+ * the panel isn't ready quite it might respond NAK here which means+ * we need to try again.+ */+ for (i = 0; i < SN_LINK_TRAINING_TRIES; i++) {+ /* Semi auto link training mode */+ regmap_write(pdata->regmap, SN_ML_TX_MODE_REG, 0x0A);+ ret = regmap_read_poll_timeout(pdata->regmap, SN_ML_TX_MODE_REG, val,+ val == ML_TX_MAIN_LINK_OFF ||+ val == ML_TX_NORMAL_MODE, 1000,+ 500 * 1000);+ if (ret) {+ *last_err_str = "Training complete polling failed";+ } else if (val == ML_TX_MAIN_LINK_OFF) {+ *last_err_str = "Link training failed, link is off";+ ret = -EIO;+ continue;+ }++ break; } + /* If we saw quite a few retries, add a note about it */+ if (!ret && i > SN_LINK_TRAINING_TRIES / 2)+ DRM_DEV_INFO(pdata->dev, "Link training needed %d retries\n", i);+ exit: /* Disable the PLL if we failed */ if (ret)-- 2.28.0.806.g8561365e88-goog<o:p> </o:p><o:p> </o:p>Tested on the Lenovo C630, and haven’t seen the message, although I hadn’t seen the described issue before either.Tested-By: Steev Klimaszewski <steev@kali.org></div></body></html>