<div dir="ltr"><div>Hi Rob,<br></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">Rob Herring <<a href="mailto:robh%2Bdt@kernel.org">robh+dt@kernel.org</a>> 于2020å¹´12月1日周二 上åˆ4:31写é“:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">On Mon, Nov 30, 2020 at 7:29 AM Kevin Tang <<a href="mailto:kevin3.tang@gmail.com" target="_blank">kevin3.tang@gmail.com</a>> wrote:<br>
><br>
> From: Kevin Tang <<a href="mailto:kevin.tang@unisoc.com" target="_blank">kevin.tang@unisoc.com</a>><br>
><br>
> Adds MIPI DSI Master and MIPI DSI-PHY (D-PHY)<br>
> support for Unisoc's display subsystem.<br>
><br>
> Cc: Orson Zhai <<a href="mailto:orsonzhai@gmail.com" target="_blank">orsonzhai@gmail.com</a>><br>
> Cc: Chunyan Zhang <<a href="mailto:zhang.lyra@gmail.com" target="_blank">zhang.lyra@gmail.com</a>><br>
> Signed-off-by: Kevin Tang <<a href="mailto:kevin.tang@unisoc.com" target="_blank">kevin.tang@unisoc.com</a>><br>
> ---<br>
> .../display/sprd/sprd,sharkl3-dsi-host.yaml    | 107 +++++++++++++++++++++<br>
> .../display/sprd/sprd,sharkl3-dsi-phy.yaml     | 84 ++++++++++++++++<br>
>Â 2 files changed, 191 insertions(+)<br>
>Â create mode 100644 Documentation/devicetree/bindings/display/sprd/sprd,sharkl3-dsi-host.yaml<br>
>Â create mode 100644 Documentation/devicetree/bindings/display/sprd/sprd,sharkl3-dsi-phy.yaml<br>
><br>
> diff --git a/Documentation/devicetree/bindings/display/sprd/sprd,sharkl3-dsi-host.yaml b/Documentation/devicetree/bindings/display/sprd/sprd,sharkl3-dsi-host.yaml<br>
> new file mode 100644<br>
> index 0000000..fe0e89d<br>
> --- /dev/null<br>
> +++ b/Documentation/devicetree/bindings/display/sprd/sprd,sharkl3-dsi-host.yaml<br>
> @@ -0,0 +1,107 @@<br>
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)<br>
> +%YAML 1.2<br>
> +---<br>
> +$id: <a href="http://devicetree.org/schemas/display/sprd/sprd,sharkl3-dsi-host.yaml#" rel="noreferrer" target="_blank">http://devicetree.org/schemas/display/sprd/sprd,sharkl3-dsi-host.yaml#</a><br>
> +$schema: <a href="http://devicetree.org/meta-schemas/core.yaml#" rel="noreferrer" target="_blank">http://devicetree.org/meta-schemas/core.yaml#</a><br>
> +<br>
> +title: Unisoc MIPI DSI Controller<br>
> +<br>
> +maintainers:<br>
> +Â - Kevin Tang <<a href="mailto:kevin.tang@unisoc.com" target="_blank">kevin.tang@unisoc.com</a>><br>
> +<br>
> +properties:<br>
> +Â compatible:<br>
> +Â Â const: sprd,sharkl3-dsi-host<br>
> +<br>
> +Â reg:<br>
> +Â Â maxItems: 1<br>
> +Â Â description:<br>
> +Â Â Â Physical base address and length of the registers set for the device.<br>
> +<br>
> +Â interrupts:<br>
> +Â Â maxItems: 2<br>
> +Â Â description:<br>
> +Â Â Â Should contain DSI interrupt.<br>
> +<br>
> +Â clocks:<br>
> +Â Â minItems: 1<br>
> +<br>
> +Â clock-names:<br>
> +Â Â items:<br>
> +Â Â Â - const: clk_src_96m<br>
> +<br>
> +Â power-domains:<br>
> +Â Â maxItems: 1<br>
> +Â Â description: A phandle to DSIM power domain node<br>
> +<br>
> +Â ports:<br>
> +Â Â type: object<br>
> +<br>
> +Â Â properties:<br>
> +Â Â Â "#address-cells":<br>
> +Â Â Â Â const: 1<br>
> +<br>
> +Â Â Â "#size-cells":<br>
> +Â Â Â Â const: 0<br>
> +<br>
> +Â Â Â port@0:<br>
> +Â Â Â Â type: object<br>
> +Â Â Â Â description:<br>
> +Â Â Â Â Â A port node with endpoint definitions as defined in<br>
> +Â Â Â Â Â Documentation/devicetree/bindings/media/video-interfaces.txt.<br>
> +Â Â Â Â Â That port should be the input endpoint, usually coming from<br>
> +Â Â Â Â Â the associated DPU.<br>
> +Â Â Â port@1:<br>
> +Â Â Â Â type: object<br>
> +Â Â Â Â description:<br>
> +Â Â Â Â Â A port node with endpoint definitions as defined in<br>
> +Â Â Â Â Â Documentation/devicetree/bindings/media/video-interfaces.txt.<br>
> +Â Â Â Â Â That port should be the output endpoint, usually output to<br>
> +Â Â Â Â Â the associated DPHY.<br>
> +<br>
> +Â Â required:<br>
> +Â Â Â - "#address-cells"<br>
> +Â Â Â - "#size-cells"<br>
> +Â Â Â - port@0<br>
> +Â Â Â - port@1<br>
> +<br>
> +Â Â additionalProperties: false<br>
> +<br>
> +required:<br>
> +Â - compatible<br>
> +Â - reg<br>
> +Â - interrupts<br>
> +Â - clocks<br>
> +Â - clock-names<br>
> +Â - ports<br>
> +<br>
> +additionalProperties: false<br>
> +<br>
> +examples:<br>
> +Â - |<br>
> +Â Â #include <dt-bindings/interrupt-controller/arm-gic.h><br>
> +Â Â #include <dt-bindings/clock/sprd,sc9860-clk.h><br>
> +Â Â dsi: dsi@63100000 {<br>
> +Â Â Â Â compatible = "sprd,sharkl3-dsi-host";<br>
> +Â Â Â Â reg = <0x63100000 0x1000>;<br>
> +Â Â Â Â interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,<br>
> +Â Â Â Â Â <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;<br>
> +Â Â Â Â clock-names = "clk_src_96m";<br>
> +Â Â Â Â clocks = <&pll CLK_TWPLL_96M>;<br>
> +Â Â Â Â ports {<br>
> +Â Â Â Â Â Â #address-cells = <1>;<br>
> +Â Â Â Â Â Â #size-cells = <0>;<br>
> +Â Â Â Â Â Â port@0 {<br>
> +Â Â Â Â Â Â Â Â reg = <0>;<br>
> +Â Â Â Â Â Â Â Â dsi_in: endpoint {<br>
> +Â Â Â Â Â Â Â Â Â Â remote-endpoint = <&dpu_out>;<br>
> +Â Â Â Â Â Â Â Â };<br>
> +Â Â Â Â Â Â };<br>
> +Â Â Â Â Â Â port@1 {<br>
> +Â Â Â Â Â Â Â Â reg = <1>;<br>
> +Â Â Â Â Â Â Â Â dsi_out: endpoint {<br>
> +Â Â Â Â Â Â Â Â Â Â remote-endpoint = <&dphy_in>;<br>
> +Â Â Â Â Â Â Â Â };<br>
> +Â Â Â Â Â Â };<br>
> +Â Â Â Â };<br>
> +Â Â };<br>
> diff --git a/Documentation/devicetree/bindings/display/sprd/sprd,sharkl3-dsi-phy.yaml b/Documentation/devicetree/bindings/display/sprd/sprd,sharkl3-dsi-phy.yaml<br>
> new file mode 100644<br>
> index 0000000..b4715d5<br>
> --- /dev/null<br>
> +++ b/Documentation/devicetree/bindings/display/sprd/sprd,sharkl3-dsi-phy.yaml<br>
> @@ -0,0 +1,84 @@<br>
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)<br>
> +%YAML 1.2<br>
> +---<br>
> +$id: <a href="http://devicetree.org/schemas/display/sprd/sprd,sharkl3-dsi-phy.yaml#" rel="noreferrer" target="_blank">http://devicetree.org/schemas/display/sprd/sprd,sharkl3-dsi-phy.yaml#</a><br>
> +$schema: <a href="http://devicetree.org/meta-schemas/core.yaml#" rel="noreferrer" target="_blank">http://devicetree.org/meta-schemas/core.yaml#</a><br>
> +<br>
> +title: Unisoc MIPI DSI-PHY (D-PHY)<br>
> +<br>
> +maintainers:<br>
> +Â - Kevin Tang <<a href="mailto:kevin.tang@unisoc.com" target="_blank">kevin.tang@unisoc.com</a>><br>
> +<br>
> +properties:<br>
> +Â compatible:<br>
> +Â Â const: sprd,sharkl3-dsi-phy<br>
> +<br>
> +Â reg:<br>
> +Â Â maxItems: 1<br>
> +Â Â description:<br>
> +Â Â Â Must be the dsi controller base address.<br>
> +<br>
> +Â ports:<br>
> +Â Â type: object<br>
> +<br>
> +Â Â properties:<br>
> +Â Â Â "#address-cells":<br>
> +Â Â Â Â const: 1<br>
> +<br>
> +Â Â Â "#size-cells":<br>
> +Â Â Â Â const: 0<br>
> +<br>
> +Â Â Â port@0:<br>
> +Â Â Â Â type: object<br>
> +Â Â Â Â description:<br>
> +Â Â Â Â Â A port node with endpoint definitions as defined in<br>
> +Â Â Â Â Â Documentation/devicetree/bindings/media/video-interfaces.txt.<br>
> +Â Â Â Â Â That port should be the output endpoint, usually output to<br>
> +Â Â Â Â Â the associated panel.<br>
> +Â Â Â port@1:<br>
<br>
For PHYs, we use the PHY binding, not the graph binding. Please follow<br>
what practically every other DSI PHY does.<br></blockquote><div><span class="gmail-VIiyi" lang="en"><span class="gmail-JLqJ4b gmail-ChMk0b"><span>It seems that the dphy driver does not need to exist alone</span></span></span>, so i remove dphy and dsi graph binding, merge the dphy driver into the dsi driver.</div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">
<br>
Rob<br>
</blockquote></div></div>