<div dir="ltr"><div>Hi Rob,<br></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">Rob Herring <<a href="mailto:robh%2Bdt@kernel.org">robh+dt@kernel.org</a>> 于2020年12月1日周二 上午4:31写道:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">On Mon, Nov 30, 2020 at 7:29 AM Kevin Tang <<a href="mailto:kevin3.tang@gmail.com" target="_blank">kevin3.tang@gmail.com</a>> wrote:<br>
><br>
> From: Kevin Tang <<a href="mailto:kevin.tang@unisoc.com" target="_blank">kevin.tang@unisoc.com</a>><br>
><br>
> Adds MIPI DSI Master and MIPI DSI-PHY (D-PHY)<br>
> support for Unisoc's display subsystem.<br>
><br>
> Cc: Orson Zhai <<a href="mailto:orsonzhai@gmail.com" target="_blank">orsonzhai@gmail.com</a>><br>
> Cc: Chunyan Zhang <<a href="mailto:zhang.lyra@gmail.com" target="_blank">zhang.lyra@gmail.com</a>><br>
> Signed-off-by: Kevin Tang <<a href="mailto:kevin.tang@unisoc.com" target="_blank">kevin.tang@unisoc.com</a>><br>
> ---<br>
>  .../display/sprd/sprd,sharkl3-dsi-host.yaml        | 107 +++++++++++++++++++++<br>
>  .../display/sprd/sprd,sharkl3-dsi-phy.yaml         |  84 ++++++++++++++++<br>
>  2 files changed, 191 insertions(+)<br>
>  create mode 100644 Documentation/devicetree/bindings/display/sprd/sprd,sharkl3-dsi-host.yaml<br>
>  create mode 100644 Documentation/devicetree/bindings/display/sprd/sprd,sharkl3-dsi-phy.yaml<br>
><br>
> diff --git a/Documentation/devicetree/bindings/display/sprd/sprd,sharkl3-dsi-host.yaml b/Documentation/devicetree/bindings/display/sprd/sprd,sharkl3-dsi-host.yaml<br>
> new file mode 100644<br>
> index 0000000..fe0e89d<br>
> --- /dev/null<br>
> +++ b/Documentation/devicetree/bindings/display/sprd/sprd,sharkl3-dsi-host.yaml<br>
> @@ -0,0 +1,107 @@<br>
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)<br>
> +%YAML 1.2<br>
> +---<br>
> +$id: <a href="http://devicetree.org/schemas/display/sprd/sprd,sharkl3-dsi-host.yaml#" rel="noreferrer" target="_blank">http://devicetree.org/schemas/display/sprd/sprd,sharkl3-dsi-host.yaml#</a><br>
> +$schema: <a href="http://devicetree.org/meta-schemas/core.yaml#" rel="noreferrer" target="_blank">http://devicetree.org/meta-schemas/core.yaml#</a><br>
> +<br>
> +title: Unisoc MIPI DSI Controller<br>
> +<br>
> +maintainers:<br>
> +  - Kevin Tang <<a href="mailto:kevin.tang@unisoc.com" target="_blank">kevin.tang@unisoc.com</a>><br>
> +<br>
> +properties:<br>
> +  compatible:<br>
> +    const: sprd,sharkl3-dsi-host<br>
> +<br>
> +  reg:<br>
> +    maxItems: 1<br>
> +    description:<br>
> +      Physical base address and length of the registers set for the device.<br>
> +<br>
> +  interrupts:<br>
> +    maxItems: 2<br>
> +    description:<br>
> +      Should contain DSI interrupt.<br>
> +<br>
> +  clocks:<br>
> +    minItems: 1<br>
> +<br>
> +  clock-names:<br>
> +    items:<br>
> +      - const: clk_src_96m<br>
> +<br>
> +  power-domains:<br>
> +    maxItems: 1<br>
> +    description: A phandle to DSIM power domain node<br>
> +<br>
> +  ports:<br>
> +    type: object<br>
> +<br>
> +    properties:<br>
> +      "#address-cells":<br>
> +        const: 1<br>
> +<br>
> +      "#size-cells":<br>
> +        const: 0<br>
> +<br>
> +      port@0:<br>
> +        type: object<br>
> +        description:<br>
> +          A port node with endpoint definitions as defined in<br>
> +          Documentation/devicetree/bindings/media/video-interfaces.txt.<br>
> +          That port should be the input endpoint, usually coming from<br>
> +          the associated DPU.<br>
> +      port@1:<br>
> +        type: object<br>
> +        description:<br>
> +          A port node with endpoint definitions as defined in<br>
> +          Documentation/devicetree/bindings/media/video-interfaces.txt.<br>
> +          That port should be the output endpoint, usually output to<br>
> +          the associated DPHY.<br>
> +<br>
> +    required:<br>
> +      - "#address-cells"<br>
> +      - "#size-cells"<br>
> +      - port@0<br>
> +      - port@1<br>
> +<br>
> +    additionalProperties: false<br>
> +<br>
> +required:<br>
> +  - compatible<br>
> +  - reg<br>
> +  - interrupts<br>
> +  - clocks<br>
> +  - clock-names<br>
> +  - ports<br>
> +<br>
> +additionalProperties: false<br>
> +<br>
> +examples:<br>
> +  - |<br>
> +    #include <dt-bindings/interrupt-controller/arm-gic.h><br>
> +    #include <dt-bindings/clock/sprd,sc9860-clk.h><br>
> +    dsi: dsi@63100000 {<br>
> +        compatible = "sprd,sharkl3-dsi-host";<br>
> +        reg = <0x63100000 0x1000>;<br>
> +        interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,<br>
> +          <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;<br>
> +        clock-names = "clk_src_96m";<br>
> +        clocks = <&pll CLK_TWPLL_96M>;<br>
> +        ports {<br>
> +            #address-cells = <1>;<br>
> +            #size-cells = <0>;<br>
> +            port@0 {<br>
> +                reg = <0>;<br>
> +                dsi_in: endpoint {<br>
> +                    remote-endpoint = <&dpu_out>;<br>
> +                };<br>
> +            };<br>
> +            port@1 {<br>
> +                reg = <1>;<br>
> +                dsi_out: endpoint {<br>
> +                    remote-endpoint = <&dphy_in>;<br>
> +                };<br>
> +            };<br>
> +        };<br>
> +    };<br>
> diff --git a/Documentation/devicetree/bindings/display/sprd/sprd,sharkl3-dsi-phy.yaml b/Documentation/devicetree/bindings/display/sprd/sprd,sharkl3-dsi-phy.yaml<br>
> new file mode 100644<br>
> index 0000000..b4715d5<br>
> --- /dev/null<br>
> +++ b/Documentation/devicetree/bindings/display/sprd/sprd,sharkl3-dsi-phy.yaml<br>
> @@ -0,0 +1,84 @@<br>
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)<br>
> +%YAML 1.2<br>
> +---<br>
> +$id: <a href="http://devicetree.org/schemas/display/sprd/sprd,sharkl3-dsi-phy.yaml#" rel="noreferrer" target="_blank">http://devicetree.org/schemas/display/sprd/sprd,sharkl3-dsi-phy.yaml#</a><br>
> +$schema: <a href="http://devicetree.org/meta-schemas/core.yaml#" rel="noreferrer" target="_blank">http://devicetree.org/meta-schemas/core.yaml#</a><br>
> +<br>
> +title: Unisoc MIPI DSI-PHY (D-PHY)<br>
> +<br>
> +maintainers:<br>
> +  - Kevin Tang <<a href="mailto:kevin.tang@unisoc.com" target="_blank">kevin.tang@unisoc.com</a>><br>
> +<br>
> +properties:<br>
> +  compatible:<br>
> +    const: sprd,sharkl3-dsi-phy<br>
> +<br>
> +  reg:<br>
> +    maxItems: 1<br>
> +    description:<br>
> +      Must be the dsi controller base address.<br>
> +<br>
> +  ports:<br>
> +    type: object<br>
> +<br>
> +    properties:<br>
> +      "#address-cells":<br>
> +        const: 1<br>
> +<br>
> +      "#size-cells":<br>
> +        const: 0<br>
> +<br>
> +      port@0:<br>
> +        type: object<br>
> +        description:<br>
> +          A port node with endpoint definitions as defined in<br>
> +          Documentation/devicetree/bindings/media/video-interfaces.txt.<br>
> +          That port should be the output endpoint, usually output to<br>
> +          the associated panel.<br>
> +      port@1:<br>
<br>
For PHYs, we use the PHY binding, not the graph binding. Please follow<br>
what practically every other DSI PHY does.<br></blockquote><div><span class="gmail-VIiyi" lang="en"><span class="gmail-JLqJ4b gmail-ChMk0b"><span>It seems that the dphy driver does not need to exist alone</span></span></span>, so i remove dphy and dsi graph binding, merge the dphy driver into the dsi driver.</div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">
<br>
Rob<br>
</blockquote></div></div>