<div dir="ltr"><div dir="ltr">Hello,<div>the mentioned branch requires the following commit, but it is already applied in 5.10 released kernel,</div><div>so I really do not know what next step here.</div><div><br></div><div><a href="https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=8c4e4fd607b17973e54a7e9cc4c275b12ab7308e">https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=8c4e4fd607b17973e54a7e9cc4c275b12ab7308e</a><br></div><div><br></div><div>Mauro</div></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Tue, Dec 15, 2020 at 11:24 AM kernel test robot <<a href="mailto:lkp@intel.com">lkp@intel.com</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">tree: git://<a href="http://people.freedesktop.org/~agd5f/linux.git" rel="noreferrer" target="_blank">people.freedesktop.org/~agd5f/linux.git</a> amd-20.45<br> head: a3950d94b046fb206e58fd3ec717f071c0203ba3<br> commit: e809646e73921328d66a2fbfddf067b9cdb30998 [1953/2427] drm/amd/display: enable SI support in the Kconfig (v2)<br> config: x86_64-randconfig-a001-20201214 (attached as .config)<br> compiler: clang version 12.0.0 (<a href="https://github.com/llvm/llvm-project" rel="noreferrer" target="_blank">https://github.com/llvm/llvm-project</a> a29ecca7819a6ed4250d3689b12b1f664bb790d7)<br> reproduce (this is a W=1 build):<br> wget <a href="https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross" rel="noreferrer" target="_blank">https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross</a> -O ~/bin/make.cross<br> chmod +x ~/bin/make.cross<br> # install x86_64 cross compiling tool for clang build<br> # apt-get install binutils-x86-64-linux-gnu<br> git remote add radeon-alex git://<a href="http://people.freedesktop.org/~agd5f/linux.git" rel="noreferrer" target="_blank">people.freedesktop.org/~agd5f/linux.git</a><br> git fetch --no-tags radeon-alex amd-20.45<br> git checkout e809646e73921328d66a2fbfddf067b9cdb30998<br> # save the attached .config to linux build tree<br> COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64 <br> <br> If you fix the issue, kindly add following tag as appropriate<br> Reported-by: kernel test robot <<a href="mailto:lkp@intel.com" target="_blank">lkp@intel.com</a>><br> <br> All warnings (new ones prefixed by >>):<br> <br> >> drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dce60/dce60_clk_mgr.c:83:5: warning: no previous prototype for function 'dce60_get_dp_ref_freq_khz' [-Wmissing-prototypes]<br> int dce60_get_dp_ref_freq_khz(struct clk_mgr *clk_mgr_base)<br> ^<br> drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dce60/dce60_clk_mgr.c:83:1: note: declare 'static' if the function is not intended to be used outside of this translation unit<br> int dce60_get_dp_ref_freq_khz(struct clk_mgr *clk_mgr_base)<br> ^<br> static <br> 1 warning generated.<br> <br> vim +/dce60_get_dp_ref_freq_khz +83 drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dce60/dce60_clk_mgr.c<br> <br> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11 82 <br> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11 @83 int dce60_get_dp_ref_freq_khz(struct clk_mgr *clk_mgr_base)<br> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11 84 {<br> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11 85 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base);<br> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11 86 int dprefclk_wdivider;<br> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11 87 int dp_ref_clk_khz;<br> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11 88 int target_div;<br> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11 89 <br> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11 90 /* DCE6 has no DPREFCLK_CNTL to read DP Reference Clock source */<br> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11 91 <br> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11 92 /* Read the mmDENTIST_DISPCLK_CNTL to get the currently<br> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11 93 * programmed DID DENTIST_DPREFCLK_WDIVIDER*/<br> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11 94 REG_GET(DENTIST_DISPCLK_CNTL, DENTIST_DPREFCLK_WDIVIDER, &dprefclk_wdivider);<br> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11 95 <br> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11 96 /* Convert DENTIST_DPREFCLK_WDIVIDERto actual divider*/<br> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11 97 target_div = dentist_get_divider_from_did(dprefclk_wdivider);<br> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11 98 <br> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11 99 /* Calculate the current DFS clock, in kHz.*/<br> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11 100 dp_ref_clk_khz = (DENTIST_DIVIDER_RANGE_SCALE_FACTOR<br> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11 101 * clk_mgr->base.dentist_vco_freq_khz) / target_div;<br> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11 102 <br> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11 103 return dce_adjust_dp_ref_freq_for_ss(clk_mgr, dp_ref_clk_khz);<br> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11 104 }<br> 2428ad5c6ece1a6 Mauro Rossi 2020-07-11 105 <br> <br> :::::: The code at line 83 was first introduced by commit<br> :::::: 2428ad5c6ece1a6861278c01c5e71c8ea258f3d9 drm/amd/display: dc/clk_mgr: add support for SI parts (v2)<br> <br> :::::: TO: Mauro Rossi <<a href="mailto:issor.oruam@gmail.com" target="_blank">issor.oruam@gmail.com</a>><br> :::::: CC: Yang Xiong <<a href="mailto:Yang.Xiong@amd.com" target="_blank">Yang.Xiong@amd.com</a>><br> <br> ---<br> 0-DAY CI Kernel Test Service, Intel Corporation<br> <a href="https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org" rel="noreferrer" target="_blank">https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org</a><br> </blockquote></div></div>