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On 4/26/2023 10:29, John Harrison wrote:<br>
<blockquote type="cite" cite="mid:413b6fc5-3182-d5cd-9a86-d7a4d814064c@intel.com">
On 4/25/2023 12:05, Teres Alexis, Alan Previn wrote:<br>
<blockquote type="cite" cite="mid:9e0711a1e40cdeccdf6ae003e924dfec5cdbb77b.camel@intel.com">
<pre class="moz-quote-pre" wrap="">On Thu, 2023-04-06 at 15:26 -0700, <a class="moz-txt-link-abbreviated moz-txt-link-freetext" href="mailto:John.C.Harrison@Intel.com" moz-do-not-send="true">John.C.Harrison@Intel.com</a> wrote:
</pre>
<blockquote type="cite">
<pre class="moz-quote-pre" wrap="">From: John Harrison <a class="moz-txt-link-rfc2396E" href="mailto:John.C.Harrison@Intel.com" moz-do-not-send="true"><John.C.Harrison@Intel.com></a>
Fix Xe_LP name.
Signed-off-by: John Harrison <a class="moz-txt-link-rfc2396E" href="mailto:John.C.Harrison@Intel.com" moz-do-not-send="true"><John.C.Harrison@Intel.com></a>
</pre>
</blockquote>
<pre class="moz-quote-pre" wrap="">alan:snip
</pre>
<blockquote type="cite">
<pre class="moz-quote-pre" wrap="">-/* GEN9/XE_LPD - Render / Compute Per-Engine-Instance */
+/* GEN8+ Render / Compute Per-Engine-Instance */
</pre>
</blockquote>
<pre class="moz-quote-pre" wrap="">alan: two comments on this:
1. shouldnt this go with the earlier patch?</pre>
</blockquote>
See comment in cover letter:<br>
<blockquote>
<pre class="moz-quote-pre" wrap="">NB: The changes are being sent as multiple patches to make code review
simpler. However, before merging it may be better to squash into a
single patch, especially if it going to be sent with a 'fixes' tag.</pre>
</blockquote>
<br>
<br>
<blockquote type="cite" cite="mid:9e0711a1e40cdeccdf6ae003e924dfec5cdbb77b.camel@intel.com">
<pre class="moz-quote-pre" wrap="">2. i agree with renaming the names of the register to reflect the when
all of those registers got first introduced... however, considering
we only support GuC on Gen12 and beyond (we do have select CI-tests
that enable GuC on Gen9 but not on Gen8 and before), should we also
change the comments? I think the comment should reflect the usage
not just follow the same name of the registe #define - else why even
add the comments. (please apply this same comment for gen8_vd_inst_regs,
gen8_vec_inst_regs and gen8_blt_inst_regs).
alternatively, we could keep those GEN8+ comments above the list but maybe
add just one comment in the default list - see below.
</pre>
</blockquote>
Because at some point we might want to start supporting other
platforms. My view is that the comment should be accurate. These
registers exist on Gen8+. So if you are building a register list
for a Gen8 or later device, they can/should be included.<br>
<br>
<blockquote type="cite" cite="mid:9e0711a1e40cdeccdf6ae003e924dfec5cdbb77b.camel@intel.com">
<pre class="moz-quote-pre" wrap="">alan: snip
</pre>
<blockquote type="cite">
<pre class="moz-quote-pre" wrap="">@@ -366,7 +364,7 @@ guc_capture_get_device_reglist(struct intel_guc *guc)
const struct __guc_mmio_reg_descr_group *lists;
if (GRAPHICS_VER(i915) >= 12)
- lists = xe_lpd_lists;
+ lists = xe_lp_lists;
else
lists = default_lists;
</pre>
</blockquote>
<pre class="moz-quote-pre" wrap="">alan: perhaps add a comment that we really don't support any of this
on anything below Gen9?</pre>
</blockquote>
It wasn't me that named it 'default_' rather than gen9_. I could
add yet another rename of s/default_/gen9_/g...<br>
<br>
John.<br>
</blockquote>
Although looking at the lists, there is nothing gen9 specific
anywhere. So gen8_ would be the more accurate name.<br>
<br>
John.<br>
<br>
<blockquote type="cite" cite="mid:413b6fc5-3182-d5cd-9a86-d7a4d814064c@intel.com"> <br>
<blockquote type="cite" cite="mid:9e0711a1e40cdeccdf6ae003e924dfec5cdbb77b.camel@intel.com">
<blockquote type="cite">
<pre class="moz-quote-pre" wrap="">
</pre>
</blockquote>
</blockquote>
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