<div dir="ltr"><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Wed, Aug 23, 2023 at 1:17 PM Danilo Krummrich <<a href="mailto:dakr@redhat.com">dakr@redhat.com</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">Currently, NO_PREFETCH is passed implicitly through<br>
drm_nouveau_gem_pushbuf_push::length and drm_nouveau_exec_push::va_len.<br>
<br>
Since this is a direct representation of how the HW is programmed it<br>
isn't really future proof for a uAPI. Hence, fix this up for the new<br>
uAPI and split up the va_len field of struct drm_nouveau_exec_push,<br>
such that we keep 32bit for va_len and 32bit for flags.<br>
<br>
For drm_nouveau_gem_pushbuf_push::length at least provide<br>
NOUVEAU_GEM_PUSHBUF_NO_PREFETCH to indicate the bit shift.<br>
<br>
While at it, fix up nv50_dma_push() as well, such that the caller<br>
doesn't need to encode the NO_PREFETCH flag into the length parameter.<br>
<br>
Signed-off-by: Danilo Krummrich <<a href="mailto:dakr@redhat.com" target="_blank">dakr@redhat.com</a>><br></blockquote><div><br></div><div>Still</div><div><br></div><div>Reviewed-by: Faith Ekstrand <<a href="mailto:faith.ekstrand@collabora.com">faith.ekstrand@collabora.com</a>></div><div> </div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">
---<br>
Changes in v2:<br>
- dma: rename prefetch to no_prefetch in nv50_dma_push() (Faith)<br>
- exec: print error message when pushbuf size larger max pushbuf size (Faith)<br>
---<br>
drivers/gpu/drm/nouveau/nouveau_dma.c | 7 +++++--<br>
drivers/gpu/drm/nouveau/nouveau_dma.h | 8 ++++++--<br>
drivers/gpu/drm/nouveau/nouveau_exec.c | 19 ++++++++++++++++---<br>
drivers/gpu/drm/nouveau/nouveau_gem.c | 6 ++++--<br>
include/uapi/drm/nouveau_drm.h | 8 +++++++-<br>
5 files changed, 38 insertions(+), 10 deletions(-)<br>
<br>
diff --git a/drivers/gpu/drm/nouveau/nouveau_dma.c b/drivers/gpu/drm/nouveau/nouveau_dma.c<br>
index b90cac6d5772..b01c029f3a90 100644<br>
--- a/drivers/gpu/drm/nouveau/nouveau_dma.c<br>
+++ b/drivers/gpu/drm/nouveau/nouveau_dma.c<br>
@@ -69,16 +69,19 @@ READ_GET(struct nouveau_channel *chan, uint64_t *prev_get, int *timeout)<br>
}<br>
<br>
void<br>
-nv50_dma_push(struct nouveau_channel *chan, u64 offset, int length)<br>
+nv50_dma_push(struct nouveau_channel *chan, u64 offset, u32 length,<br>
+ bool no_prefetch)<br>
{<br>
struct nvif_user *user = &chan->drm->client.device.user;<br>
struct nouveau_bo *pb = chan->push.buffer;<br>
int ip = (chan->dma.ib_put * 2) + chan->dma.ib_base;<br>
<br>
BUG_ON(chan->dma.ib_free < 1);<br>
+ WARN_ON(length > NV50_DMA_PUSH_MAX_LENGTH);<br>
<br>
nouveau_bo_wr32(pb, ip++, lower_32_bits(offset));<br>
- nouveau_bo_wr32(pb, ip++, upper_32_bits(offset) | length << 8);<br>
+ nouveau_bo_wr32(pb, ip++, upper_32_bits(offset) | length << 8 |<br>
+ (no_prefetch ? (1 << 31) : 0));<br>
<br>
chan->dma.ib_put = (chan->dma.ib_put + 1) & chan->dma.ib_max;<br>
<br>
diff --git a/drivers/gpu/drm/nouveau/nouveau_dma.h b/drivers/gpu/drm/nouveau/nouveau_dma.h<br>
index 035a709c7be1..1744d95b233e 100644<br>
--- a/drivers/gpu/drm/nouveau/nouveau_dma.h<br>
+++ b/drivers/gpu/drm/nouveau/nouveau_dma.h<br>
@@ -31,7 +31,8 @@<br>
#include "nouveau_chan.h"<br>
<br>
int nouveau_dma_wait(struct nouveau_channel *, int slots, int size);<br>
-void nv50_dma_push(struct nouveau_channel *, u64 addr, int length);<br>
+void nv50_dma_push(struct nouveau_channel *, u64 addr, u32 length,<br>
+ bool no_prefetch);<br>
<br>
/*<br>
* There's a hw race condition where you can't jump to your PUT offset,<br>
@@ -45,6 +46,9 @@ void nv50_dma_push(struct nouveau_channel *, u64 addr, int length);<br>
*/<br>
#define NOUVEAU_DMA_SKIPS (128 / 4)<br>
<br>
+/* Maximum push buffer size. */<br>
+#define NV50_DMA_PUSH_MAX_LENGTH 0x7fffff<br>
+<br>
/* Object handles - for stuff that's doesn't use handle == oclass. */<br>
enum {<br>
NvDmaFB = 0x80000002,<br>
@@ -89,7 +93,7 @@ FIRE_RING(struct nouveau_channel *chan)<br>
<br>
if (chan->dma.ib_max) {<br>
nv50_dma_push(chan, chan->push.addr + (chan->dma.put << 2),<br>
- (chan->dma.cur - chan->dma.put) << 2);<br>
+ (chan->dma.cur - chan->dma.put) << 2, false);<br>
} else {<br>
WRITE_PUT(chan->dma.cur);<br>
}<br>
diff --git a/drivers/gpu/drm/nouveau/nouveau_exec.c b/drivers/gpu/drm/nouveau/nouveau_exec.c<br>
index 0f927adda4ed..a90c4cd8cbb2 100644<br>
--- a/drivers/gpu/drm/nouveau/nouveau_exec.c<br>
+++ b/drivers/gpu/drm/nouveau/nouveau_exec.c<br>
@@ -164,8 +164,10 @@ nouveau_exec_job_run(struct nouveau_job *job)<br>
}<br>
<br>
for (i = 0; i < exec_job->push.count; i++) {<br>
- nv50_dma_push(chan, exec_job->push.s[i].va,<br>
- exec_job->push.s[i].va_len);<br>
+ struct drm_nouveau_exec_push *p = &exec_job->push.s[i];<br>
+ bool no_prefetch = p->flags & DRM_NOUVEAU_EXEC_PUSH_NO_PREFETCH;<br>
+<br>
+ nv50_dma_push(chan, p->va, p->va_len, no_prefetch);<br>
}<br>
<br>
ret = nouveau_fence_emit(fence, chan);<br>
@@ -223,7 +225,18 @@ nouveau_exec_job_init(struct nouveau_exec_job **pjob,<br>
{<br>
struct nouveau_exec_job *job;<br>
struct nouveau_job_args args = {};<br>
- int ret;<br>
+ int i, ret;<br>
+<br>
+ for (i = 0; i < __args->push.count; i++) {<br>
+ struct drm_nouveau_exec_push *p = &__args->push.s[i];<br>
+<br>
+ if (unlikely(p->va_len > NV50_DMA_PUSH_MAX_LENGTH)) {<br>
+ NV_PRINTK(err, nouveau_cli(__args->file_priv),<br>
+ "pushbuf size exceeds limit: 0x%x max 0x%x\n",<br>
+ p->va_len, NV50_DMA_PUSH_MAX_LENGTH);<br>
+ return -EINVAL;<br>
+ }<br>
+ }<br>
<br>
job = *pjob = kzalloc(sizeof(*job), GFP_KERNEL);<br>
if (!job)<br>
diff --git a/drivers/gpu/drm/nouveau/nouveau_gem.c b/drivers/gpu/drm/nouveau/nouveau_gem.c<br>
index f39360870c70..c0b10d8d3d03 100644<br>
--- a/drivers/gpu/drm/nouveau/nouveau_gem.c<br>
+++ b/drivers/gpu/drm/nouveau/nouveau_gem.c<br>
@@ -856,9 +856,11 @@ nouveau_gem_ioctl_pushbuf(struct drm_device *dev, void *data,<br>
for (i = 0; i < req->nr_push; i++) {<br>
struct nouveau_vma *vma = (void *)(unsigned long)<br>
bo[push[i].bo_index].user_priv;<br>
+ u64 addr = vma->addr + push[i].offset;<br>
+ u32 length = push[i].length & ~NOUVEAU_GEM_PUSHBUF_NO_PREFETCH;<br>
+ bool no_prefetch = push[i].length & NOUVEAU_GEM_PUSHBUF_NO_PREFETCH;<br>
<br>
- nv50_dma_push(chan, vma->addr + push[i].offset,<br>
- push[i].length);<br>
+ nv50_dma_push(chan, addr, length, no_prefetch);<br>
}<br>
} else<br>
if (drm-><a href="http://client.device.info" target="_blank">client.device.info</a>.chipset >= 0x25) {<br>
diff --git a/include/uapi/drm/nouveau_drm.h b/include/uapi/drm/nouveau_drm.h<br>
index b1ad9d5ffce8..8f16724b5d05 100644<br>
--- a/include/uapi/drm/nouveau_drm.h<br>
+++ b/include/uapi/drm/nouveau_drm.h<br>
@@ -138,6 +138,7 @@ struct drm_nouveau_gem_pushbuf_push {<br>
__u32 pad;<br>
__u64 offset;<br>
__u64 length;<br>
+#define NOUVEAU_GEM_PUSHBUF_NO_PREFETCH (1 << 23)<br>
};<br>
<br>
struct drm_nouveau_gem_pushbuf {<br>
@@ -338,7 +339,12 @@ struct drm_nouveau_exec_push {<br>
/**<br>
* @va_len: the length of the push buffer mapping<br>
*/<br>
- __u64 va_len;<br>
+ __u32 va_len;<br>
+ /**<br>
+ * flags: the flags for this push buffer mapping<br>
+ */<br>
+ __u32 flags;<br>
+#define DRM_NOUVEAU_EXEC_PUSH_NO_PREFETCH 0x1<br>
};<br>
<br>
/**<br>
<br>
base-commit: b4e9fa933551e51459c634dc4396171dc65284a6<br>
-- <br>
2.41.0<br>
<br>
</blockquote></div></div>