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On Thu, 2024-02-15 at 11:45 +0100, AngeloGioacchino Del Regno wrote:
> Il 15/02/24 11:11, Hsiao Chien Sung ha scritto:
> > We found that IGT (Intel GPU Tool) will try to commit layers with
> > zero width or height and lead to undefined behaviors in hardware.
> > Disable the layers in such a situation.
> >
> > Fixes: 777b7bc86a0a3 ("drm/mediatek: Add ovl_adaptor support for
> > MT8195")
> > Fixes: fa97fe71f6f93 ("drm/mediatek: Add ETHDR support for MT8195")
> >
> > Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>
>
> This commit should be sent separately from this series, as it is
> fixing things
> that are not related just to IGT, but also to corner cases in regular
> non-testing
> usecases.
>
> In any case, it's not mandatory as that depends on what the
> maintainer prefers,
> so it's CK's call anyway.
>
> Besides that,
>
> Reviewed-by: AngeloGioacchino Del Regno <
> angelogioacchino.delregno@collabora.com>

Got it. Will discuss this with CK.

This bug is found when running IGT test while one of the test item
commits a layer with zero width and cuase the device to freeze.


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