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Am 28.02.24 um 20:51 schrieb Zeng, Oak:<br>
<blockquote type="cite" cite="mid:SA1PR11MB6991B3DA606280EBC6952D1092582@SA1PR11MB6991.namprd11.prod.outlook.com">
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<p class="MsoNormal">The mail wasn’t indent/preface correctly.
Manually format it.</p>
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<p class="MsoNormal" style="margin-left:36.0pt"><b><span lang="EN-US">From:</span></b><span lang="EN-US">
Christian König <<a href="mailto:christian.koenig@amd.com" moz-do-not-send="true" class="moz-txt-link-freetext">christian.koenig@amd.com</a>>
<br>
<b>Sent:</b> Tuesday, February 27, 2024 1:54 AM<br>
<b>To:</b> Zeng, Oak <<a href="mailto:oak.zeng@intel.com" moz-do-not-send="true" class="moz-txt-link-freetext">oak.zeng@intel.com</a>>;
Danilo Krummrich <<a href="mailto:dakr@redhat.com" moz-do-not-send="true" class="moz-txt-link-freetext">dakr@redhat.com</a>>;
Dave Airlie <<a href="mailto:airlied@redhat.com" moz-do-not-send="true" class="moz-txt-link-freetext">airlied@redhat.com</a>>;
Daniel Vetter <<a href="mailto:daniel@ffwll.ch" moz-do-not-send="true" class="moz-txt-link-freetext">daniel@ffwll.ch</a>>;
Felix Kuehling <<a href="mailto:felix.kuehling@amd.com" moz-do-not-send="true" class="moz-txt-link-freetext">felix.kuehling@amd.com</a>>;
<a href="mailto:jglisse@redhat.com" moz-do-not-send="true" class="moz-txt-link-freetext">jglisse@redhat.com</a><br>
<b>Cc:</b> Welty, Brian <<a href="mailto:brian.welty@intel.com" moz-do-not-send="true" class="moz-txt-link-freetext">brian.welty@intel.com</a>>;
<a href="mailto:dri-devel@lists.freedesktop.org" moz-do-not-send="true" class="moz-txt-link-freetext">dri-devel@lists.freedesktop.org</a>;
<a href="mailto:intel-xe@lists.freedesktop.org" moz-do-not-send="true" class="moz-txt-link-freetext">intel-xe@lists.freedesktop.org</a>;
Bommu, Krishnaiah <<a href="mailto:krishnaiah.bommu@intel.com" moz-do-not-send="true" class="moz-txt-link-freetext">krishnaiah.bommu@intel.com</a>>;
Ghimiray, Himal Prasad <<a href="mailto:himal.prasad.ghimiray@intel.com" moz-do-not-send="true" class="moz-txt-link-freetext">himal.prasad.ghimiray@intel.com</a>>;
<a href="mailto:Thomas.Hellstrom@linux.intel.com" moz-do-not-send="true" class="moz-txt-link-freetext">Thomas.Hellstrom@linux.intel.com</a>;
Vishwanathapura, Niranjana <<a href="mailto:niranjana.vishwanathapura@intel.com" moz-do-not-send="true" class="moz-txt-link-freetext">niranjana.vishwanathapura@intel.com</a>>;
Brost, Matthew <<a href="mailto:matthew.brost@intel.com" moz-do-not-send="true" class="moz-txt-link-freetext">matthew.brost@intel.com</a>>;
Gupta, saurabhg <<a href="mailto:saurabhg.gupta@intel.com" moz-do-not-send="true" class="moz-txt-link-freetext">saurabhg.gupta@intel.com</a>><br>
<b>Subject:</b> Re: Making drm_gpuvm work across gpu
devices<o:p></o:p></span></p>
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<p class="MsoNormal" style="margin-left:36.0pt"><o:p> </o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:0cm;margin-right:0cm;margin-bottom:12.0pt;margin-left:36.0pt">
Hi Oak,<o:p></o:p></p>
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<p class="MsoNormal" style="margin-left:36.0pt">Am 23.02.24
um 21:12 schrieb Zeng, Oak:<o:p></o:p></p>
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<p class="MsoNormal" style="margin-left:36.0pt">Hi
Christian,<o:p></o:p></p>
<p class="MsoNormal" style="margin-left:36.0pt"> <o:p></o:p></p>
<p class="MsoNormal" style="margin-left:36.0pt">I go back
this old email to ask a question.<o:p></o:p></p>
</blockquote>
<p class="MsoNormal" style="mso-margin-top-alt:0cm;margin-right:0cm;margin-bottom:12.0pt;margin-left:36.0pt">
<br>
sorry totally missed that one.<br>
<br>
<o:p></o:p></p>
<blockquote style="margin-top:5.0pt;margin-bottom:5.0pt">
<p class="MsoNormal" style="margin-left:36.0pt"> <o:p></o:p></p>
<p class="MsoNormal" style="margin-left:36.0pt">Quote from
your email:<o:p></o:p></p>
<p class="MsoNormal" style="margin-left:36.0pt">“Those
ranges can then be used to implement the SVM feature
required for higher level APIs and not something you need
at the UAPI or even inside the low level kernel memory
management.”<o:p></o:p></p>
<p class="MsoNormal" style="margin-left:36.0pt">“SVM is a
high level concept of OpenCL, Cuda, ROCm etc.. This should
not have any influence on the design of the kernel UAPI.”<o:p></o:p></p>
<p class="MsoNormal" style="margin-left:36.0pt"> <o:p></o:p></p>
<p class="MsoNormal" style="margin-left:36.0pt"><span class="ui-provider">There are two category of SVM:</span><o:p></o:p></p>
<p class="MsoListParagraph" style="margin-left:72.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo3">
<!--[if !supportLists]--><span style="mso-list:Ignore">1.<span style="font:7.0pt "Times New Roman"">
</span></span><!--[endif]--><span class="ui-provider">driver
svm allocator: this is implemented in user space, i.g.,
cudaMallocManaged (cuda) or zeMemAllocShared (L0) or
clSVMAlloc(openCL). Intel already have
gem_create/vm_bind in xekmd and our umd implemented
clSVMAlloc and zeMemAllocShared on top of
gem_create/vm_bind. </span>Range A..B of the process
address space is mapped into a range C..D of the GPU
address space, exactly as you said.<o:p></o:p></p>
<p class="MsoListParagraph" style="margin-left:72.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo3">
<!--[if !supportLists]--><span style="mso-list:Ignore">2.<span style="font:7.0pt "Times New Roman"">
</span></span><!--[endif]--><span class="ui-provider">system
svm allocator: This doesn’t introduce extra driver API
for memory allocation. Any valid CPU virtual address can
be used directly transparently in a GPU program without
any extra driver API call. Quote from kernel
Documentation/vm/hmm.hst: “Any application memory region
(private anonymous, shared memory, or regular file
backed memory) can be used by a device transparently”
and “</span><span style="color:black">to share the
address space by duplicating the CPU page table in the
device page table so the same address points to the same
physical memory for any valid main memory address in the
process address space</span><span class="ui-provider">”.
In system svm allocator, we don’t need that A..B C..D
mapping.</span><o:p></o:p></p>
<p class="MsoNormal" style="margin-left:36.0pt"> <o:p></o:p></p>
<p class="MsoNormal" style="margin-left:36.0pt">It looks
like you were talking of 1). Were you?<o:p></o:p></p>
</blockquote>
<p class="MsoNormal" style="margin-left:36.0pt"><br>
No, even when you fully mirror the whole address space from
a process into the GPU you still need to enable this somehow
with an IOCTL.<br>
<br>
And while enabling this you absolutely should specify to
which part of the address space this mirroring applies and
where it maps to.<o:p></o:p></p>
<p class="MsoNormal" style="margin-left:36.0pt"><o:p> </o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal"><b><i>[Zeng, Oak] </i></b><o:p></o:p></p>
<p class="MsoNormal">Lets say we have a hardware platform
where both CPU and GPU support 57bit(use it for example. The
statement apply to any address range) virtual address range,
how do you decide “which part of the address space this
mirroring applies”? You have to mirror the whole address
space [0~2^57-1], do you? As you designed it, the gigantic
vm_bind/mirroring happens at the process initialization
time, and at that time, you don’t know which part of the
address space will be used for gpu program. Remember for
system allocator, *any* valid CPU address can be used for
GPU program. If you add an offset to [0~2^57-1], you get an
address out of 57bit address range. Is this a valid concern?</p>
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<br>
Well you can perfectly mirror on demand. You just need something
similar to userfaultfd() for the GPU. This way you don't need to
mirror the full address space, but can rather work with large chunks
created on demand, let's say 1GiB or something like that.<br>
<br>
The virtual address space is basically just a hardware functionality
to route memory accesses. While the mirroring approach is a very
common use case for data-centers and high performance computing
there are quite a number of different use cases which makes use of
virtual address space in a non "standard" fashion. The native
context approach for VMs is just one example, databases and
emulators are another one.<br>
<br>
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<p class="MsoNormal" style="margin-left:36.0pt"><br>
<br>
I see the system svm allocator as just a special case of the
driver allocator where not fully backed buffer objects are
allocated, but rather sparse one which are filled and
migrated on demand.<o:p></o:p></p>
<p class="MsoNormal" style="margin-left:36.0pt"><o:p> </o:p></p>
<p class="MsoNormal" style="margin-left:36.0pt"><o:p> </o:p></p>
<p class="MsoNormal"><b><i>[Zeng, Oak] <o:p></o:p></i></b></p>
<p class="MsoNormal">Above statement is true to me. We don’t
have BO for system svm allocator. It is a sparse one as we
can sparsely map vma to GPU. Our migration policy decide
which pages/how much of the vma is migrated/mapped to GPU
page table.<o:p></o:p></p>
<p class="MsoNormal"><b><i><o:p> </o:p></i></b></p>
<p class="MsoNormal">The difference b/t your mind and mine is,
you want a gigantic vma (created during the gigantic
vm_bind) to be sparsely populated to gpu. While I thought
vma (xe_vma in xekmd codes) is a place to save memory
attributes (such as caching, user preferred placement etc).
All those memory attributes are range based, i.e., user can
specify range1 is cached while range2 is uncached. So I
don’t see how you can manage it with the gigantic vma. Do
you split your gigantic vma later to save range based memory
attributes?</p>
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</blockquote>
<br>
Yes, exactly that. I mean the splitting and eventually merging of
ranges is a standard functionality of the GPUVM code.<br>
<br>
So when you need to store additional attributes per range then I
would strongly suggest to make use of this splitting and merging
functionality as well.<br>
<br>
So basically an IOCTL which says range A..B of the GPU address space
is mapped to offset X of the CPU address space with parameters Y
(caching, migration behavior etc..). That is essentially the same we
have for mapping GEM objects, the provider of the backing store is
just something different.<br>
<br>
Regards,<br>
Christian.<br>
<br>
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<p class="MsoNormal">Regards,<o:p></o:p></p>
<p class="MsoNormal">Oak <o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:0cm;margin-right:0cm;margin-bottom:12.0pt;margin-left:36.0pt">
<br>
<br>
Regards,<br>
Christian.<br>
<br>
<o:p></o:p></p>
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