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Hi, Jason:
On Sun, 2024-05-26 at 22:44 +0800, Jason-JH.Lin wrote:
> To support secure video path feature, GCE have to read/write registgers
> in the secure world. GCE will enable the secure access permission to the
> HW who wants to access the secure content buffer.
>
> Add CMDQ secure mailbox driver to make CMDQ client user is able to
> sending their HW settings to the secure world. So that GCE can execute
> all instructions to configure HW in the secure world.
>
> TODO:
> 1. Squash cmdq_sec_task_exec_work() into cmdq_sec_mbox_send_data().
> 2. Call into TEE to query cookie instead of using shared memory in
> cmdq_sec_get_cookie().
> 3. Register shared memory as command buffer instead of copying normal
> command buffer to IWC shared memory.
> 4. Use SOFTDEP to make cmdq_sec_probe later than OPTEE loaded and then
> move cmdq_sec_session_init into cmdq_sec_probe().
> 5. Remove timeout detection in cmdq_sec_session_send().
>
> Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
> Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>
> ---
[snip]
> +/*
> + * enum cmdq_sec_engine_enum - the flag for HW engines need to be proteced in secure world.
> + * Each enum is a bit in a u64 engine flag variable.
> + */
> +enum cmdq_sec_engine_enum {
> +/* MDP */
> +CMDQ_SEC_MDP_RDMA0= 0,
> +CMDQ_SEC_MDP_RDMA1= 1,
> +CMDQ_SEC_MDP_WDMA= 2,
> +CMDQ_SEC_MDP_RDMA2= 3,
> +CMDQ_SEC_MDP_RDMA3= 4,
> +CMDQ_SEC_MDP_WROT0= 5,
> +CMDQ_SEC_MDP_WROT1= 6,
> +CMDQ_SEC_MDP_WROT2= 7,
> +CMDQ_SEC_MDP_WROT3= 8,
> +CMDQ_SEC_MDP_HDR0= 9,
> +CMDQ_SEC_MDP_HDR1= 10,
> +CMDQ_SEC_MDP_HDR2= 11,
> +CMDQ_SEC_MDP_HDR3= 12,
> +CMDQ_SEC_MDP_AAL0= 13,
> +CMDQ_SEC_MDP_AAL1= 14,
> +CMDQ_SEC_MDP_AAL2= 15,
> +CMDQ_SEC_MDP_AAL3= 16,
> +
> +/* DISP (VDOSYS0) */
> +CMDQ_SEC_DISP_RDMA0= 17,
> +CMDQ_SEC_DISP_RDMA1= 18,
> +CMDQ_SEC_DISP_WDMA0= 19,
> +CMDQ_SEC_DISP_WDMA1= 20,
> +CMDQ_SEC_DISP_OVL0= 21,
> +CMDQ_SEC_DISP_OVL1= 22,
> +CMDQ_SEC_DISP_OVL2= 23,
> +CMDQ_SEC_DISP_2L_OVL0= 24,
> +CMDQ_SEC_DISP_2L_OVL1= 25,
> +CMDQ_SEC_DISP_2L_OVL2= 26,
> +
> +/* DSIP (VDOSYS1) */
> +CMDQ_SEC_VDO1_DISP_RDMA_L0= 27,
> +CMDQ_SEC_VDO1_DISP_RDMA_L1= 28,
> +CMDQ_SEC_VDO1_DISP_RDMA_L2= 29,
> +CMDQ_SEC_VDO1_DISP_RDMA_L3= 30,
> +
> +/* VENC */
> +CMDQ_SEC_VENC_BSDMA= 31,
> +CMDQ_SEC_VENC_CUR_LUMA= 32,
> +CMDQ_SEC_VENC_CUR_CHROMA= 33,
> +CMDQ_SEC_VENC_REF_LUMA= 34,
> +CMDQ_SEC_VENC_REF_CHROMA= 35,
> +CMDQ_SEC_VENC_REC= 36,
> +CMDQ_SEC_VENC_SUB_R_LUMA= 37,
> +CMDQ_SEC_VENC_SUB_W_LUMA= 38,
> +CMDQ_SEC_VENC_SV_COMV= 39,
> +CMDQ_SEC_VENC_RD_COMV= 40,
> +CMDQ_SEC_VENC_NBM_RDMA= 41,
> +CMDQ_SEC_VENC_NBM_WDMA= 42,
> +CMDQ_SEC_VENC_NBM_RDMA_LITE= 43,
> +CMDQ_SEC_VENC_NBM_WDMA_LITE= 44,
> +CMDQ_SEC_VENC_FCS_NBM_RDMA= 45,
> +CMDQ_SEC_VENC_FCS_NBM_WDMA= 46,
> +
> +CMDQ_SEC_MAX_ENG_COUNT
> +};
Useless, so drop these.
Regards,
CK
> +
</pre>
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