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<div class="moz-cite-prefix">On 10/15/2024 7:31 PM, Rob Herring
wrote:<br>
</div>
<blockquote type="cite"
cite="mid:20241015140108.GA620512-robh@kernel.org">
<pre class="moz-quote-pre" wrap="">On Tue, Oct 15, 2024 at 05:37:46PM +0530, Jyothi Kumar Seerapu wrote:
</pre>
<blockquote type="cite">
<pre class="moz-quote-pre" wrap="">When high performance with multiple i2c messages in a single transfer
is required, employ Block Event Interrupt (BEI) to trigger interrupts
after specific messages transfer and the last message transfer,
thereby reducing interrupts.
For each i2c message transfer, a series of Transfer Request Elements(TREs)
must be programmed, including config tre for frequency configuration,
go tre for holding i2c address and dma tre for holding dma buffer address,
length as per the hardware programming guide. For transfer using BEI,
multiple I2C messages may necessitate the preparation of config, go,
and tx DMA TREs. However, a channel TRE size of 64 is often insufficient,
potentially leading to failures due to inadequate memory space.
Add additional argument to dma-cell property for channel TRE size.
</pre>
</blockquote>
<pre class="moz-quote-pre" wrap="">
No such property 'dma-cell'</pre>
</blockquote>
Thanks for pointing out it, yeah it should be '<span
style="white-space: pre-wrap">'dma-cells'.</span> <br>
<blockquote type="cite"
cite="mid:20241015140108.GA620512-robh@kernel.org">
<pre class="moz-quote-pre" wrap="">
</pre>
<blockquote type="cite">
<pre class="moz-quote-pre" wrap="">With this, adjust the channel TRE size via the device tree.
The default size is 64, but clients can modify this value based on
their specific requirements.
Signed-off-by: Jyothi Kumar Seerapu <a class="moz-txt-link-rfc2396E" href="mailto:quic_jseerapu@quicinc.com"><quic_jseerapu@quicinc.com></a>
---
Documentation/devicetree/bindings/dma/qcom,gpi.yaml | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/dma/qcom,gpi.yaml b/Documentation/devicetree/bindings/dma/qcom,gpi.yaml
index 4df4e61895d2..002495921643 100644
--- a/Documentation/devicetree/bindings/dma/qcom,gpi.yaml
+++ b/Documentation/devicetree/bindings/dma/qcom,gpi.yaml
@@ -54,14 +54,16 @@ properties:
maxItems: 13
"#dma-cells":
- const: 3
+ minItems: 3
+ maxItems: 4
description: >
DMA clients must use the format described in dma.txt, giving a phandle
- to the DMA controller plus the following 3 integer cells:
+ to the DMA controller plus the following 4 integer cells:
- channel: if set to 0xffffffff, any available channel will be allocated
for the client. Otherwise, the exact channel specified will be used.
- seid: serial id of the client as defined in the SoC documentation.
- client: type of the client as defined in dt-bindings/dma/qcom-gpi.h
+ - channel-tre-size: size of the channel TRE (transfer ring element)
iommus:
maxItems: 1
--
2.17.1
</pre>
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