<html><body><p> <pre> On Tue, 2025-06-10 at 23:12 +0800, Icenowy Zheng wrote: > External email : Please do not click links or open attachments until you have verified the sender or the content. > > > 在 2025-05-31星期六的 20:11 +0800，Icenowy Zheng写道： > > Currently even the SoC's OVL does not declare the support of AFBC, > > AFBC > > is still announced to the userspace within the IN_FORMATS blob, which > > breaks modern Wayland compositors like KWin Wayland and others. > > > > Gate passing modifiers to drm_universal_plane_init() behind querying > > the > > driver of the hardware block for AFBC support. > > > > Fixes: c410fa9b07c3 ("drm/mediatek: Add AFBC support to Mediatek DRM > > driver") > > Signed-off-by: Icenowy Zheng <uwu@icenowy.me> > > --- > > Ping. > > This patch at least fixes running regular Wayland desktops on > postmarketOS (I posted this patch there). Reviewed-by: CK Hu <ck.hu@medaitek.com> > > > Patch tested on MT8183, on which KWin Wayland 5.27.12 is fixed. > > > > In addition, I tried to fake supports_afbc in mt8183_ovl_driver_data > > and > > mt8183_ovl_2l_driver_data, then KWin Wayland gets broken again and > > modetest also shows the AFBC modifier in IN_FORMATS. > > > > drivers/gpu/drm/mediatek/mtk_crtc.c | 3 ++- > > drivers/gpu/drm/mediatek/mtk_ddp_comp.c | 1 + > > drivers/gpu/drm/mediatek/mtk_ddp_comp.h | 9 +++++++++ > > drivers/gpu/drm/mediatek/mtk_disp_drv.h | 1 + > > drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 7 +++++++ > > drivers/gpu/drm/mediatek/mtk_plane.c | 7 +++++-- > > drivers/gpu/drm/mediatek/mtk_plane.h | 3 ++- > > 7 files changed, 27 insertions(+), 4 deletions(-) > > > > diff --git a/drivers/gpu/drm/mediatek/mtk_crtc.c > > b/drivers/gpu/drm/mediatek/mtk_crtc.c > > index 8f6fba4217ece..53359c2465b65 100644 > > --- a/drivers/gpu/drm/mediatek/mtk_crtc.c > > +++ b/drivers/gpu/drm/mediatek/mtk_crtc.c > > @@ -930,7 +930,8 @@ static int mtk_crtc_init_comp_planes(struct > > drm_device *drm_dev, > > mtk_ddp_comp_supported_rotations(comp > > ), > > mtk_ddp_comp_get_blend_modes(comp), > > mtk_ddp_comp_get_formats(comp), > > - mtk_ddp_comp_get_num_formats(comp), > > i); > > + mtk_ddp_comp_get_num_formats(comp), > > + mtk_ddp_comp_is_afbc_supported(comp), > > i); > > if (ret) > > return ret; > > > > diff --git a/drivers/gpu/drm/mediatek/mtk_ddp_comp.c > > b/drivers/gpu/drm/mediatek/mtk_ddp_comp.c > > index edc6417639e64..ac6620e10262e 100644 > > --- a/drivers/gpu/drm/mediatek/mtk_ddp_comp.c > > +++ b/drivers/gpu/drm/mediatek/mtk_ddp_comp.c > > @@ -366,6 +366,7 @@ static const struct mtk_ddp_comp_funcs ddp_ovl = > > { > > .get_blend_modes = mtk_ovl_get_blend_modes, > > .get_formats = mtk_ovl_get_formats, > > .get_num_formats = mtk_ovl_get_num_formats, > > + .is_afbc_supported = mtk_ovl_is_afbc_supported, > > }; > > > > static const struct mtk_ddp_comp_funcs ddp_postmask = { > > diff --git a/drivers/gpu/drm/mediatek/mtk_ddp_comp.h > > b/drivers/gpu/drm/mediatek/mtk_ddp_comp.h > > index 39720b27f4e9e..7289b3dcf22f2 100644 > > --- a/drivers/gpu/drm/mediatek/mtk_ddp_comp.h > > +++ b/drivers/gpu/drm/mediatek/mtk_ddp_comp.h > > @@ -83,6 +83,7 @@ struct mtk_ddp_comp_funcs { > > u32 (*get_blend_modes)(struct device *dev); > > const u32 *(*get_formats)(struct device *dev); > > size_t (*get_num_formats)(struct device *dev); > > + bool (*is_afbc_supported)(struct device *dev); > > void (*connect)(struct device *dev, struct device *mmsys_dev, > > unsigned int next); > > void (*disconnect)(struct device *dev, struct device > > *mmsys_dev, unsigned int next); > > void (*add)(struct device *dev, struct mtk_mutex *mutex); > > @@ -294,6 +295,14 @@ size_t mtk_ddp_comp_get_num_formats(struct > > mtk_ddp_comp *comp) > > return 0; > > } > > > > +static inline bool mtk_ddp_comp_is_afbc_supported(struct > > mtk_ddp_comp *comp) > > +{ > > + if (comp->funcs && comp->funcs->is_afbc_supported) > > + return comp->funcs->is_afbc_supported(comp->dev); > > + > > + return false; > > +} > > + > > static inline bool mtk_ddp_comp_add(struct mtk_ddp_comp *comp, > > struct mtk_mutex *mutex) > > { > > if (comp->funcs && comp->funcs->add) { > > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_drv.h > > b/drivers/gpu/drm/mediatek/mtk_disp_drv.h > > index 04217a36939cd..679d413bf10be 100644 > > --- a/drivers/gpu/drm/mediatek/mtk_disp_drv.h > > +++ b/drivers/gpu/drm/mediatek/mtk_disp_drv.h > > @@ -106,6 +106,7 @@ void mtk_ovl_disable_vblank(struct device *dev); > > u32 mtk_ovl_get_blend_modes(struct device *dev); > > const u32 *mtk_ovl_get_formats(struct device *dev); > > size_t mtk_ovl_get_num_formats(struct device *dev); > > +bool mtk_ovl_is_afbc_supported(struct device *dev); > > > > void mtk_ovl_adaptor_add_comp(struct device *dev, struct mtk_mutex > > *mutex); > > void mtk_ovl_adaptor_remove_comp(struct device *dev, struct > > mtk_mutex *mutex); > > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c > > b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c > > index d0581c4e3c999..e0236353d4997 100644 > > --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c > > +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c > > @@ -236,6 +236,13 @@ size_t mtk_ovl_get_num_formats(struct device > > *dev) > > return ovl->data->num_formats; > > } > > > > +bool mtk_ovl_is_afbc_supported(struct device *dev) > > +{ > > + struct mtk_disp_ovl *ovl = dev_get_drvdata(dev); > > + > > + return ovl->data->supports_afbc; > > +} > > + > > int mtk_ovl_clk_enable(struct device *dev) > > { > > struct mtk_disp_ovl *ovl = dev_get_drvdata(dev); > > diff --git a/drivers/gpu/drm/mediatek/mtk_plane.c > > b/drivers/gpu/drm/mediatek/mtk_plane.c > > index 655106bbb76d3..e08b771bc25e9 100644 > > --- a/drivers/gpu/drm/mediatek/mtk_plane.c > > +++ b/drivers/gpu/drm/mediatek/mtk_plane.c > > @@ -321,7 +321,8 @@ static const struct drm_plane_helper_funcs > > mtk_plane_helper_funcs = { > > int mtk_plane_init(struct drm_device *dev, struct drm_plane *plane, > > unsigned long possible_crtcs, enum drm_plane_type > > type, > > unsigned int supported_rotations, const u32 > > blend_modes, > > - const u32 *formats, size_t num_formats, unsigned > > int plane_idx) > > + const u32 *formats, size_t num_formats, > > + bool supports_afbc, unsigned int plane_idx) > > { > > int err; > > > > @@ -332,7 +333,9 @@ int mtk_plane_init(struct drm_device *dev, struct > > drm_plane *plane, > > > > err = drm_universal_plane_init(dev, plane, possible_crtcs, > > &mtk_plane_funcs, formats, > > - num_formats, modifiers, type, > > NULL); > > + num_formats, > > + supports_afbc ? modifiers : > > NULL, > > + type, NULL); > > if (err) { > > DRM_ERROR("failed to initialize plane\n"); > > return err; > > diff --git a/drivers/gpu/drm/mediatek/mtk_plane.h > > b/drivers/gpu/drm/mediatek/mtk_plane.h > > index 3b13b89989c7e..95c5fa5295d8a 100644 > > --- a/drivers/gpu/drm/mediatek/mtk_plane.h > > +++ b/drivers/gpu/drm/mediatek/mtk_plane.h > > @@ -49,5 +49,6 @@ to_mtk_plane_state(struct drm_plane_state *state) > > int mtk_plane_init(struct drm_device *dev, struct drm_plane *plane, > > unsigned long possible_crtcs, enum drm_plane_type > > type, > > unsigned int supported_rotations, const u32 > > blend_modes, > > - const u32 *formats, size_t num_formats, unsigned > > int plane_idx); > > + const u32 *formats, size_t num_formats, > > + bool supports_afbc, unsigned int plane_idx); > > #endif > </pre> </p></body></html><pre>************* MEDIATEK Confidentiality Notice ******************** The information contained in this e-mail message (including any attachments) may be confidential, proprietary, privileged, or otherwise exempt from disclosure under applicable laws. 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