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[AMD Official Use Only - AMD Internal Distribution Only]<br>
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> > + spin_lock(&filp->table_lock);</div>
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> > + idr_for_each_entry(&filp->object_idr, gobj, id)</div>
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> > + num_bos += 1;</div>
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> > + spin_unlock(&filp->table_lock);</div>
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> > +</div>
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> > + if (args->num_bos < num_bos) {</div>
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> > + args->num_bos = num_bos;</div>
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> > + goto exit;</div>
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> </div>
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> Since this path doesn't require any cleanup, you could just return. But maybe this should return an error code to let user mode know that it should retry with a bigger bucket allocation. -ENOSPC?</div>
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> </div>
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<br>
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I wasn't sure if sending back information from an ioctl in the structs while also returning an error value was acceptable. If it is, I'll make that change.</div>
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> > + idr_for_each_entry(&filp->object_idr, gobj, id) {</div>
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> > + struct amdgpu_bo *bo = gem_to_amdgpu_bo(gobj);</div>
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> > + struct drm_amdgpu_criu_bo_bucket *bo_bucket;</div>
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> > +</div>
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> > + bo_bucket = &bo_buckets[bo_index];</div>
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> > +</div>
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> > + bo_bucket->size = amdgpu_bo_size(bo);</div>
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> > + bo_bucket->alloc_flags = bo->flags & (~AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE);</div>
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> </div>
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> I'm not sure why you're removing this flag. I think we always set it implicitly when creating a new BO (and presumably during restore), but there should be no harm in leaving this flag set anyway.</div>
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> </div>
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The driver doesn't like this flag being set on requests to create bo. Since this is meant to be sending to the user the flags userspace will need to recreate the bo, I thought to leave it off.</div>
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></div>
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> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c</div>
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> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c</div>
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> ></div>
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> > +#include "amdgpu_criu.h"</div>
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> > +</div>
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> </div>
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> Why is this header file needed here? None of the new ioctls will be implemented in kfd_chardev.c.</div>
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<br>
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amdgpu_drv.c needs the header with the ioctl declarations for its ioctl definitions. Not sure if there's another way I should be including them.</div>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> Kuehling, Felix <Felix.Kuehling@amd.com><br>
<b>Sent:</b> Wednesday, June 18, 2025 5:05 PM<br>
<b>To:</b> Francis, David <David.Francis@amd.com>; dri-devel@lists.freedesktop.org <dri-devel@lists.freedesktop.org><br>
<b>Cc:</b> tvrtko.ursulin@igalia.com <tvrtko.ursulin@igalia.com>; Yat Sin, David <David.YatSin@amd.com>; Freehill, Chris <Chris.Freehill@amd.com>; Koenig, Christian <Christian.Koenig@amd.com>; dcostantino@meta.com <dcostantino@meta.com>; sruffell@meta.com <sruffell@meta.com>;
simona@ffwll.ch <simona@ffwll.ch>; mripard@kernel.org <mripard@kernel.org>; tzimmermann@suse.de <tzimmermann@suse.de><br>
<b>Subject:</b> Re: [PATCH 2/4] drm/amdgpu: Add CRIU ioctl to get bo info</font>
<div> </div>
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<div class="PlainText"><br>
On 2025-06-17 15:45, David Francis wrote:<br>
> Add new ioctl DRM_IOCTL_AMDGPU_CRIU_BO_INFO.<br>
><br>
> This ioctl returns a list of bos with their handles, sizes,<br>
> and flags and domains.<br>
><br>
> This ioctl is meant to be used during CRIU checkpoint and<br>
> provide information needed to reconstruct the bos<br>
> in CRIU restore.<br>
><br>
> Signed-off-by: David Francis <David.Francis@amd.com><br>
> ---<br>
> drivers/gpu/drm/amd/amdgpu/Makefile | 2 +-<br>
> drivers/gpu/drm/amd/amdgpu/amdgpu_criu.c | 144 +++++++++++++++++++++++<br>
> drivers/gpu/drm/amd/amdgpu/amdgpu_criu.h | 32 +++++<br>
> drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 2 +<br>
> drivers/gpu/drm/amd/amdkfd/kfd_chardev.c | 2 +<br>
> include/uapi/drm/amdgpu_drm.h | 28 +++++<br>
> 6 files changed, 209 insertions(+), 1 deletion(-)<br>
> create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_criu.c<br>
> create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_criu.h<br>
><br>
> diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile b/drivers/gpu/drm/amd/amdgpu/Makefile<br>
> index 87080c06e5fc..0863edcdd03f 100644<br>
> --- a/drivers/gpu/drm/amd/amdgpu/Makefile<br>
> +++ b/drivers/gpu/drm/amd/amdgpu/Makefile<br>
> @@ -63,7 +63,7 @@ amdgpu-y += amdgpu_device.o amdgpu_doorbell_mgr.o amdgpu_kms.o \<br>
> amdgpu_xgmi.o amdgpu_csa.o amdgpu_ras.o amdgpu_vm_cpu.o \<br>
> amdgpu_vm_sdma.o amdgpu_discovery.o amdgpu_ras_eeprom.o amdgpu_nbio.o \<br>
> amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o \<br>
> - amdgpu_fw_attestation.o amdgpu_securedisplay.o \<br>
> + amdgpu_fw_attestation.o amdgpu_securedisplay.o amdgpu_criu.o \<br>
> amdgpu_eeprom.o amdgpu_mca.o amdgpu_psp_ta.o amdgpu_lsdma.o \<br>
> amdgpu_ring_mux.o amdgpu_xcp.o amdgpu_seq64.o amdgpu_aca.o amdgpu_dev_coredump.o \<br>
> amdgpu_cper.o amdgpu_userq_fence.o amdgpu_eviction_fence.o<br>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_criu.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_criu.c<br>
> new file mode 100644<br>
> index 000000000000..34a0358946b6<br>
> --- /dev/null<br>
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_criu.c<br>
> @@ -0,0 +1,144 @@<br>
> +/* SPDX-License-Identifier: MIT */<br>
> +/*<br>
> +* Copyright 2025 Advanced Micro Devices, Inc.<br>
> +*<br>
> +* Permission is hereby granted, free of charge, to any person obtaining a<br>
> +* copy of this software and associated documentation files (the "Software"),<br>
> +* to deal in the Software without restriction, including without limitation<br>
> +* the rights to use, copy, modify, merge, publish, distribute, sublicense,<br>
> +* and/or sell copies of the Software, and to permit persons to whom the<br>
> +* Software is furnished to do so, subject to the following conditions:<br>
> +*<br>
> +* The above copyright notice and this permission notice shall be included in<br>
> +* all copies or substantial portions of the Software.<br>
> +*<br>
> +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR<br>
> +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,<br>
> +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL<br>
> +* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR<br>
> +* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,<br>
> +* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR<br>
> +* OTHER DEALINGS IN THE SOFTWARE.<br>
> +*/<br>
> +<br>
> +#include <linux/dma-buf.h><br>
> +#include <linux/hashtable.h><br>
> +#include <linux/mutex.h><br>
> +#include <linux/random.h><br>
> +<br>
> +#include <drm/amdgpu_drm.h><br>
> +#include <drm/drm_device.h><br>
> +#include <drm/drm_file.h><br>
> +<br>
> +#include "amdgpu_criu.h"<br>
> +<br>
> +#include <drm/amdgpu_drm.h><br>
> +#include <drm/drm_drv.h><br>
> +#include <drm/drm_exec.h><br>
> +#include <drm/drm_gem_ttm_helper.h><br>
> +#include <drm/ttm/ttm_tt.h><br>
> +#include <linux/interval_tree_generic.h><br>
> +<br>
> +#include "amdgpu.h"<br>
> +#include "amdgpu_display.h"<br>
> +#include "amdgpu_dma_buf.h"<br>
> +#include "amdgpu_hmm.h"<br>
> +#include "amdgpu_xgmi.h"<br>
<br>
That's a lot of header files. Do you really need them all?<br>
<br>
<br>
> +<br>
> +static uint32_t hardware_flags_to_uapi_flags(struct amdgpu_device *adev, uint64_t pte_flags)<br>
<br>
This function is never called.<br>
<br>
<br>
> +{<br>
> + uint32_t gem_flags = 0;<br>
> +<br>
> + //This function will be replaced by the mapping flags rework<br>
> +<br>
> + if (pte_flags & AMDGPU_PTE_EXECUTABLE)<br>
> + gem_flags |= AMDGPU_VM_PAGE_EXECUTABLE;<br>
> + if (pte_flags & AMDGPU_PTE_READABLE)<br>
> + gem_flags |= AMDGPU_VM_PAGE_READABLE;<br>
> + if (pte_flags & AMDGPU_PTE_WRITEABLE)<br>
> + gem_flags |= AMDGPU_VM_PAGE_WRITEABLE;<br>
> + if (pte_flags & AMDGPU_PTE_PRT_FLAG(adev))<br>
> + gem_flags |= AMDGPU_VM_PAGE_PRT;<br>
> + if (pte_flags & AMDGPU_PTE_NOALLOC)<br>
> + gem_flags |= AMDGPU_VM_PAGE_NOALLOC;<br>
> +<br>
> + return gem_flags;<br>
> +}<br>
> +<br>
> +<br>
> +/**<br>
> + * amdgpu_criu_bo_info_ioctl - get information about a process' buffer objects<br>
> + *<br>
> + * @dev: drm device pointer<br>
> + * @data: drm_amdgpu_criu_bo_info_args<br>
> + * @filp: drm file pointer<br>
> + *<br>
> + * num_bos is set as an input to the size of the bo_buckets array.<br>
> + * num_bos is sent back as output as the number of bos in the process.<br>
> + * If that number is larger than the size of the array, the ioctl must<br>
> + * be retried.<br>
> + *<br>
> + * Returns:<br>
> + * 0 for success, -errno for errors.<br>
> + */<br>
> +int amdgpu_criu_bo_info_ioctl(struct drm_device *dev, void *data,<br>
> + struct drm_file *filp)<br>
> +{<br>
> + struct drm_amdgpu_criu_bo_info_args *args = data;<br>
> + struct drm_amdgpu_criu_bo_bucket *bo_buckets;<br>
> + struct drm_gem_object *gobj;<br>
> + int id, ret = 0;<br>
> + int bo_index = 0;<br>
> + int num_bos = 0;<br>
> +<br>
> + spin_lock(&filp->table_lock);<br>
> + idr_for_each_entry(&filp->object_idr, gobj, id)<br>
> + num_bos += 1;<br>
> + spin_unlock(&filp->table_lock);<br>
> +<br>
> + if (args->num_bos < num_bos) {<br>
> + args->num_bos = num_bos;<br>
> + goto exit;<br>
<br>
Since this path doesn't require any cleanup, you could just return. But maybe this should return an error code to let user mode know that it should retry with a bigger bucket allocation. -ENOSPC?<br>
<br>
<br>
> + }<br>
> + args->num_bos = num_bos;<br>
> + if (num_bos == 0) {<br>
> + goto exit;<br>
<br>
Just return. 0 (success) seems fine here.<br>
<br>
<br>
> + }<br>
> +<br>
> + bo_buckets = kvzalloc(num_bos * sizeof(*bo_buckets), GFP_KERNEL);<br>
> + if (!bo_buckets) {<br>
> + ret = -ENOMEM;<br>
> + goto free_buckets;<br>
<br>
Just return -ENOMEM.<br>
<br>
<br>
> + }<br>
> +<br>
> + spin_lock(&filp->table_lock);<br>
> + idr_for_each_entry(&filp->object_idr, gobj, id) {<br>
> + struct amdgpu_bo *bo = gem_to_amdgpu_bo(gobj);<br>
> + struct drm_amdgpu_criu_bo_bucket *bo_bucket;<br>
> +<br>
> + bo_bucket = &bo_buckets[bo_index];<br>
> +<br>
> + bo_bucket->size = amdgpu_bo_size(bo);<br>
> + bo_bucket->alloc_flags = bo->flags & (~AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE);<br>
<br>
I'm not sure why you're removing this flag. I think we always set it implicitly when creating a new BO (and presumably during restore), but there should be no harm in leaving this flag set anyway.<br>
<br>
<br>
> + bo_bucket->preferred_domains = bo->preferred_domains;<br>
> + bo_bucket->gem_handle = id;<br>
> +<br>
> + if (bo->tbo.base.import_attach)<br>
> + bo_bucket->flags |= AMDGPU_CRIU_BO_FLAG_IS_IMPORT;<br>
> +<br>
> + bo_index += 1;<br>
> + }<br>
> + spin_unlock(&filp->table_lock);<br>
> +<br>
> + ret = copy_to_user((void __user *)args->bo_buckets, bo_buckets, num_bos * sizeof(*bo_buckets));<br>
> + if (ret) {<br>
> + pr_debug("Failed to copy BO information to user\n");<br>
> + ret = -EFAULT;<br>
> + }<br>
> +<br>
> +free_buckets:<br>
> + kvfree(bo_buckets);<br>
> +exit:<br>
> +<br>
> + return ret;<br>
> +}<br>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_criu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_criu.h<br>
> new file mode 100644<br>
> index 000000000000..1b18ffee6587<br>
> --- /dev/null<br>
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_criu.h<br>
> @@ -0,0 +1,32 @@<br>
> +/* SPDX-License-Identifier: MIT */<br>
> +/*<br>
> +* Copyright 2025 Advanced Micro Devices, Inc.<br>
> +*<br>
> +* Permission is hereby granted, free of charge, to any person obtaining a<br>
> +* copy of this software and associated documentation files (the "Software"),<br>
> +* to deal in the Software without restriction, including without limitation<br>
> +* the rights to use, copy, modify, merge, publish, distribute, sublicense,<br>
> +* and/or sell copies of the Software, and to permit persons to whom the<br>
> +* Software is furnished to do so, subject to the following conditions:<br>
> +*<br>
> +* The above copyright notice and this permission notice shall be included in<br>
> +* all copies or substantial portions of the Software.<br>
> +*<br>
> +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR<br>
> +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,<br>
> +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL<br>
> +* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR<br>
> +* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,<br>
> +* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR<br>
> +* OTHER DEALINGS IN THE SOFTWARE.<br>
> +*/<br>
> +<br>
> +#ifndef __AMDGPU_CRIU_H__<br>
> +#define __AMDGPU_CRIU_H__<br>
> +<br>
> +#include <drm/amdgpu_drm.h><br>
<br>
Why is this needed here? You're not using any uapi definitions below.<br>
<br>
<br>
> +<br>
> +int amdgpu_criu_bo_info_ioctl(struct drm_device *dev, void *data,<br>
> + struct drm_file *filp);<br>
> +<br>
> +#endif<br>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c<br>
> index 4db92e0a60da..bf33567bb166 100644<br>
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c<br>
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c<br>
> @@ -53,6 +53,7 @@<br>
> #include "amdgpu_xgmi.h"<br>
> #include "amdgpu_userq.h"<br>
> #include "amdgpu_userq_fence.h"<br>
> +#include "amdgpu_criu.h"<br>
> #include "../amdxcp/amdgpu_xcp_drv.h"<br>
> <br>
> /*<br>
> @@ -3021,6 +3022,7 @@ const struct drm_ioctl_desc amdgpu_ioctls_kms[] = {<br>
> DRM_IOCTL_DEF_DRV(AMDGPU_USERQ, amdgpu_userq_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),<br>
> DRM_IOCTL_DEF_DRV(AMDGPU_USERQ_SIGNAL, amdgpu_userq_signal_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),<br>
> DRM_IOCTL_DEF_DRV(AMDGPU_USERQ_WAIT, amdgpu_userq_wait_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),<br>
> + DRM_IOCTL_DEF_DRV(AMDGPU_CRIU_BO_INFO, amdgpu_criu_bo_info_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),<br>
> };<br>
> <br>
> static const struct drm_driver amdgpu_kms_driver = {<br>
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c<br>
> index a2149afa5803..a8cf2d4580cc 100644<br>
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c<br>
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c<br>
> @@ -45,6 +45,8 @@<br>
> #include "amdgpu_dma_buf.h"<br>
> #include "kfd_debug.h"<br>
> <br>
> +#include "amdgpu_criu.h"<br>
> +<br>
<br>
Why is this header file needed here? None of the new ioctls will be implemented in kfd_chardev.c.<br>
<br>
Regards,<br>
Felix<br>
<br>
<br>
> static long kfd_ioctl(struct file *, unsigned int, unsigned long);<br>
> static int kfd_open(struct inode *, struct file *);<br>
> static int kfd_release(struct inode *, struct file *);<br>
> diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h<br>
> index 45c4fa13499c..1508c55ff92a 100644<br>
> --- a/include/uapi/drm/amdgpu_drm.h<br>
> +++ b/include/uapi/drm/amdgpu_drm.h<br>
> @@ -57,6 +57,7 @@ extern "C" {<br>
> #define DRM_AMDGPU_USERQ 0x16<br>
> #define DRM_AMDGPU_USERQ_SIGNAL 0x17<br>
> #define DRM_AMDGPU_USERQ_WAIT 0x18<br>
> +#define DRM_AMDGPU_CRIU_BO_INFO 0x19<br>
> <br>
> #define DRM_IOCTL_AMDGPU_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_CREATE, union drm_amdgpu_gem_create)<br>
> #define DRM_IOCTL_AMDGPU_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_MMAP, union drm_amdgpu_gem_mmap)<br>
> @@ -77,6 +78,7 @@ extern "C" {<br>
> #define DRM_IOCTL_AMDGPU_USERQ DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_USERQ, union drm_amdgpu_userq)<br>
> #define DRM_IOCTL_AMDGPU_USERQ_SIGNAL DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_USERQ_SIGNAL, struct drm_amdgpu_userq_signal)<br>
> #define DRM_IOCTL_AMDGPU_USERQ_WAIT DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_USERQ_WAIT, struct drm_amdgpu_userq_wait)<br>
> +#define DRM_IOCTL_AMDGPU_CRIU_BO_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_CRIU_BO_INFO, struct drm_amdgpu_criu_bo_info_args)<br>
> <br>
> /**<br>
> * DOC: memory domains<br>
> @@ -1626,6 +1628,32 @@ struct drm_color_ctm_3x4 {<br>
> __u64 matrix[12];<br>
> };<br>
> <br>
> +#define AMDGPU_CRIU_BO_FLAG_IS_IMPORT (1 << 0)<br>
> +<br>
> +struct drm_amdgpu_criu_bo_info_args {<br>
> + /* IN: Size of bo_buckets buffer. OUT: Number of bos in process (if larger than size of buffer, must retry) */<br>
> + __u32 num_bos;<br>
> +<br>
> + /* User pointer to array of drm_amdgpu_criu_bo_bucket */<br>
> + __u64 bo_buckets;<br>
> +};<br>
> +<br>
> +struct drm_amdgpu_criu_bo_bucket {<br>
> + /* Size of bo */<br>
> + __u64 size;<br>
> +<br>
> + /* GEM_CREATE flags for re-creation of buffer */<br>
> + __u64 alloc_flags;<br>
> +<br>
> + /* Pending how to handle this; provides information needed to remake the buffer on restore */<br>
> + __u32 preferred_domains;<br>
> +<br>
> + /* Currently just one flag: IS_IMPORT */<br>
> + __u32 flags;<br>
> +<br>
> + __u32 gem_handle;<br>
> +};<br>
> +<br>
> #if defined(__cplusplus)<br>
> }<br>
> #endif<br>
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