<html><body><p> <pre> On Mon, 2025-07-07 at 09:31 +0800, shangyao lin wrote: > From: "shangyao.lin" <shangyao.lin@mediatek.com> > > 1. Add camera isp7x module device document > > --- > > Changes in v2: > - Rename binding file to mediatek,mt8188-seninf-core.yaml > - Various fixes per review comments > - Update maintainers list > > Question for reviewer (CK): > > Hi CK, > > Thank you for your review and suggestions on this patch, especially for providing the reference patch (https://urldefense.com/v3/__https://patchwork.kernel.org/project/linux-mediatek/list/?series=874617__;!!CTRNKA9wMg0ARbw!lK62bVQ9-iOIdvsqy3Y0MZIGQl5Szp23K-rB_IB5uffV-tfbML9p144Cgt-4xTpgeYQWungRDBzhfuY1fYflBnk$ ) and for mentioning in another patch ([V1,02/10] MEDIA: PLATFORM: MEDIATEK: ADD SENINF CONTROLLER) the suggestion to "Move the phy part to phy/mediatek/ folder. You could refer to phy/mediatek/phy-mtk-mipi-csi-0-5.c". > > After reading your comments and the reference patches, my understanding is that only the seninf-core driver should manage all ports internally, and each port corresponds to a PHY. During probe, the driver will parse each port, obtain the corresponding PHY (e.g., devm_phy_get(dev, "csi0"), devm_phy_get(dev, "csi1"), etc.), and operate the PHY for each port individually during stream on/off or power on/off. > > Could you please confirm if my understanding is correct? > If you have any additional reference patches or examples, I would greatly appreciate it. I'm not expert on seninf and I find previous link [1] is invalid now. I provide [2] here for your reference. I don't know the relation of port and phy. You may find some hint in that link. [1] https://patchwork.kernel.org/project/linux-mediatek/list/?series=874617 [2] https://patchwork.kernel.org/project/linux-mediatek/patch/20241121-add-mtk-isp-3-0-support-v7-3-b04dc9610619@baylibre.com/ > > Thank you for your guidance! > > Best regards, > Shangyao > > Signed-off-by: shangyao.lin <shangyao.lin@mediatek.com> > --- [snip] > + > +examples: > + - | > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + #include <dt-bindings/interrupt-controller/irq.h> > + #include <dt-bindings/power/mediatek,mt8188-power.h> > + #include <dt-bindings/clock/mediatek,mt8188-clk.h> > + > + seninf@16010000 { > + compatible = "mediatek,mt8188-seninf-core"; > + reg = <0 0x16010000 0 0x8000>; > + reg-names = "base"; > + mtk_csi_phy_ver = "mtk_csi_phy_2_0"; mtk_csi_phy_ver is not necessary. compatible imply this. So drop this. Regards, CK > + interrupts = <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH 0>; > + power-domains = <&spm MT8188_POWER_DOMAIN_CSIRX_TOP>, > + <&spm MT8188_POWER_DOMAIN_CAM_VCORE>, > + <&spm MT8188_POWER_DOMAIN_CAM_MAIN>; > + clocks = <&camsys CLK_CAM_MAIN_SENINF>, > + <&topckgen CLK_TOP_SENINF>, > + <&topckgen CLK_TOP_SENINF1>, > + <&topckgen CLK_TOP_CAMTM>; > + clock-names = "clk_cam_seninf", > + "clk_top_seninf", > + "clk_top_seninf1", > + "clk_top_camtm"; > + }; > + > +... > \ No newline at end of file </pre> </p></body></html><pre>************* MEDIATEK Confidentiality Notice ******************** The information contained in this e-mail message (including any attachments) may be confidential, proprietary, privileged, or otherwise exempt from disclosure under applicable laws. It is intended to be conveyed only to the designated recipient(s). Any use, dissemination, distribution, printing, retaining or copying of this e-mail (including its attachments) by unintended recipient(s) is strictly prohibited and may be unlawful. If you are not an intended recipient of this e-mail, or believe that you have received this e-mail in error, please notify the sender immediately (by replying to this e-mail), delete any and all copies of this e-mail (including any attachments) from your system, and do not disclose the content of this e-mail to any other person. Thank you! </pre>