[PATCH v2 2/2] etnaviv: fix XV resize for UYVY source format

[Lucas Stach]

Contrary to what is stated in the documentation, the stage1 buffer for the
filter blit needs to have the same component ordering as the source image,
otherwise it will only be zero filled when doing the stage1 blit.

This has been validated to be correct on:
- i.MX6DL (GC320 rev 5007)
- i.MX6Q  (GC320 rev 5007)
- i.MX6QP (GC320 rev 5303)

Signed-off-by: Lucas Stach <l.stach at pengutronix.de>
---
v2:
- add comment to code and provide better commit message
---
 etnaviv/etnaviv_xv.c | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/etnaviv/etnaviv_xv.c b/etnaviv/etnaviv_xv.c
index 081c12abf1e2..85beeb2d8b9d 100644
--- a/etnaviv/etnaviv_xv.c
+++ b/etnaviv/etnaviv_xv.c
@@ -426,7 +426,17 @@ static int etnaviv_configure_format(struct etnaviv_xv_priv *priv,
 		priv->stage1_format.tile = 1;
 		priv->stage1_pitch = etnaviv_tile_pitch(width, bpp);
 	} else if (VIV_FEATURE(etnaviv->conn, chipMinorFeatures0, 2DPE20)) {
-		priv->stage1_format = fmt_yuy2;
+		/*
+		 * Documentation (for example i.MX6 reference manual chapter
+		 * 31.4.1.6 Filter BLT) states that the only valid stage1 format
+		 * for the filter blit is YUY2. However in reality it seems that
+		 * we must match the internal component ordering of the source
+		 * image, otherwise the stage1 buffer will be zero filled.
+		 */
+		if (priv->source_format.format == DE_FORMAT_UYVY)
+			priv->stage1_format = fmt_uyvy;
+		else
+			priv->stage1_format = fmt_yuy2;
 		priv->stage1_pitch = etnaviv_pitch(width, 16);
 	} else {
 		priv->stage1_format = vPix->format;
-- 
2.10.2