[PATCH 10/19] etnaviv: GC7000: No RS align when using BLT

[Wladimir]

>> +      if (!ctx->specs.use_blt) {
>> +         /* This (ab)uses the RS as a plain buffer memset().
>> +          * Currently uses a fixed row size of 64 bytes. Some benchmarking with
>> +          * different sizes may be in order. */
>> +         struct etna_bo *ts_bo = etna_resource(surf->base.texture)->ts_bo;
>> +         etna_compile_rs_state(ctx, &surf->clear_command, &(struct rs_state) {
>> +            .source_format = RS_FORMAT_A8R8G8B8,
>> +            .dest_format = RS_FORMAT_A8R8G8B8,
>> +            .dest = ts_bo,
>> +            .dest_offset = surf->surf.ts_offset,
>> +            .dest_stride = 0x40,
>> +            .dest_tiling = ETNA_LAYOUT_TILED,
>> +            .dither = {0xffffffff, 0xffffffff},
>> +            .width = 16,
>> +            .height = etna_align_up(surf->surf.ts_size / 0x40, 4),
>> +            .clear_value = {ctx->specs.ts_clear_value},
>> +            .clear_mode = VIVS_RS_CLEAR_CONTROL_MODE_ENABLED1,
>> +            .clear_bits = 0xffff
>> +         });
>> +      }
>>     } else {
>> -      etna_rs_gen_clear_surface(ctx, surf, surf->level->clear_value);
>> +      if (!ctx->specs.use_blt)
>> +         etna_rs_gen_clear_surface(ctx, surf, surf->level->clear_value);
>>     }
>>
>
> if (!ctx->specs.use_blt) {
> } else {
>    if (!ctx->specs.use_blt)
>       ..
> }
>
> Looks funny... btw. do you have a git branch somewhere to look at this sereis?

It looks somewhat funny but I don't think it's wrong.
There's an extra } there. Context is:

if (surf->surf.ts_size) {
  if (!ctx->specs.use_blt) {
    ...
  }
} else {
    if (!ctx->specs.use_blt)
    ..
}

My current working tree can be found at
https://github.com/laanwj/mesa/tree/gc7000. It contains these patches
(but also some temporary local scaffolding, so be warned).

Wladimir