[PATCH] Revert "drm/etnaviv: Expose a few more chipspecs to userspace"
Tomeu Vizoso
tomeu at tomeuvizoso.net
Sun Apr 21 07:11:00 UTC 2024
Agreed, thanks for doing this, Christian.
Reviewed-by: Tomeu Vizoso <tomeu at tomeuvizoso.net>
Cheers,
Tomeu
On Sat, Apr 20, 2024 at 3:41 PM Christian Gmeiner
<christian.gmeiner at gmail.com> wrote:
>
> From: Christian Gmeiner <cgmeiner at igalia.com>
>
> This reverts commit 1dccdba084897443d116508a8ed71e0ac8a031a4.
>
> In userspace a different approach was choosen - hwdb. As a result, there
> is no need for these values.
>
> Signed-off-by: Christian Gmeiner <cgmeiner at igalia.com>
> ---
> drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 20 ---------------
> drivers/gpu/drm/etnaviv/etnaviv_gpu.h | 12 ---------
> drivers/gpu/drm/etnaviv/etnaviv_hwdb.c | 34 --------------------------
> include/uapi/drm/etnaviv_drm.h | 5 ----
> 4 files changed, 71 deletions(-)
>
> diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
> index 734412aae94d..e47e5562535a 100644
> --- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
> +++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
> @@ -164,26 +164,6 @@ int etnaviv_gpu_get_param(struct etnaviv_gpu *gpu, u32 param, u64 *value)
> *value = gpu->identity.eco_id;
> break;
>
> - case ETNAVIV_PARAM_GPU_NN_CORE_COUNT:
> - *value = gpu->identity.nn_core_count;
> - break;
> -
> - case ETNAVIV_PARAM_GPU_NN_MAD_PER_CORE:
> - *value = gpu->identity.nn_mad_per_core;
> - break;
> -
> - case ETNAVIV_PARAM_GPU_TP_CORE_COUNT:
> - *value = gpu->identity.tp_core_count;
> - break;
> -
> - case ETNAVIV_PARAM_GPU_ON_CHIP_SRAM_SIZE:
> - *value = gpu->identity.on_chip_sram_size;
> - break;
> -
> - case ETNAVIV_PARAM_GPU_AXI_SRAM_SIZE:
> - *value = gpu->identity.axi_sram_size;
> - break;
> -
> default:
> DBG("%s: invalid param: %u", dev_name(gpu->dev), param);
> return -EINVAL;
> diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.h b/drivers/gpu/drm/etnaviv/etnaviv_gpu.h
> index 7d5e9158e13c..197e0037732e 100644
> --- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.h
> +++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.h
> @@ -54,18 +54,6 @@ struct etnaviv_chip_identity {
> /* Number of Neural Network cores. */
> u32 nn_core_count;
>
> - /* Number of MAD units per Neural Network core. */
> - u32 nn_mad_per_core;
> -
> - /* Number of Tensor Processing cores. */
> - u32 tp_core_count;
> -
> - /* Size in bytes of the SRAM inside the NPU. */
> - u32 on_chip_sram_size;
> -
> - /* Size in bytes of the SRAM across the AXI bus. */
> - u32 axi_sram_size;
> -
> /* Size of the vertex cache. */
> u32 vertex_cache_size;
>
> diff --git a/drivers/gpu/drm/etnaviv/etnaviv_hwdb.c b/drivers/gpu/drm/etnaviv/etnaviv_hwdb.c
> index d8e7334de8ce..8665f2658d51 100644
> --- a/drivers/gpu/drm/etnaviv/etnaviv_hwdb.c
> +++ b/drivers/gpu/drm/etnaviv/etnaviv_hwdb.c
> @@ -17,10 +17,6 @@ static const struct etnaviv_chip_identity etnaviv_chip_identities[] = {
> .thread_count = 128,
> .shader_core_count = 1,
> .nn_core_count = 0,
> - .nn_mad_per_core = 0,
> - .tp_core_count = 0,
> - .on_chip_sram_size = 0,
> - .axi_sram_size = 0,
> .vertex_cache_size = 8,
> .vertex_output_buffer_size = 1024,
> .pixel_pipes = 1,
> @@ -52,11 +48,6 @@ static const struct etnaviv_chip_identity etnaviv_chip_identities[] = {
> .register_max = 64,
> .thread_count = 256,
> .shader_core_count = 1,
> - .nn_core_count = 0,
> - .nn_mad_per_core = 0,
> - .tp_core_count = 0,
> - .on_chip_sram_size = 0,
> - .axi_sram_size = 0,
> .vertex_cache_size = 8,
> .vertex_output_buffer_size = 512,
> .pixel_pipes = 1,
> @@ -89,10 +80,6 @@ static const struct etnaviv_chip_identity etnaviv_chip_identities[] = {
> .thread_count = 512,
> .shader_core_count = 2,
> .nn_core_count = 0,
> - .nn_mad_per_core = 0,
> - .tp_core_count = 0,
> - .on_chip_sram_size = 0,
> - .axi_sram_size = 0,
> .vertex_cache_size = 16,
> .vertex_output_buffer_size = 1024,
> .pixel_pipes = 1,
> @@ -125,10 +112,6 @@ static const struct etnaviv_chip_identity etnaviv_chip_identities[] = {
> .thread_count = 512,
> .shader_core_count = 2,
> .nn_core_count = 0,
> - .nn_mad_per_core = 0,
> - .tp_core_count = 0,
> - .on_chip_sram_size = 0,
> - .axi_sram_size = 0,
> .vertex_cache_size = 16,
> .vertex_output_buffer_size = 1024,
> .pixel_pipes = 1,
> @@ -160,11 +143,6 @@ static const struct etnaviv_chip_identity etnaviv_chip_identities[] = {
> .register_max = 64,
> .thread_count = 512,
> .shader_core_count = 2,
> - .nn_core_count = 0,
> - .nn_mad_per_core = 0,
> - .tp_core_count = 0,
> - .on_chip_sram_size = 0,
> - .axi_sram_size = 0,
> .vertex_cache_size = 16,
> .vertex_output_buffer_size = 1024,
> .pixel_pipes = 1,
> @@ -197,10 +175,6 @@ static const struct etnaviv_chip_identity etnaviv_chip_identities[] = {
> .thread_count = 1024,
> .shader_core_count = 4,
> .nn_core_count = 0,
> - .nn_mad_per_core = 0,
> - .tp_core_count = 0,
> - .on_chip_sram_size = 0,
> - .axi_sram_size = 0,
> .vertex_cache_size = 16,
> .vertex_output_buffer_size = 1024,
> .pixel_pipes = 2,
> @@ -233,10 +207,6 @@ static const struct etnaviv_chip_identity etnaviv_chip_identities[] = {
> .thread_count = 256,
> .shader_core_count = 1,
> .nn_core_count = 8,
> - .nn_mad_per_core = 64,
> - .tp_core_count = 4,
> - .on_chip_sram_size = 524288,
> - .axi_sram_size = 1048576,
> .vertex_cache_size = 16,
> .vertex_output_buffer_size = 1024,
> .pixel_pipes = 1,
> @@ -269,10 +239,6 @@ static const struct etnaviv_chip_identity etnaviv_chip_identities[] = {
> .thread_count = 256,
> .shader_core_count = 1,
> .nn_core_count = 6,
> - .nn_mad_per_core = 64,
> - .tp_core_count = 3,
> - .on_chip_sram_size = 262144,
> - .axi_sram_size = 0,
> .vertex_cache_size = 16,
> .vertex_output_buffer_size = 1024,
> .pixel_pipes = 1,
> diff --git a/include/uapi/drm/etnaviv_drm.h b/include/uapi/drm/etnaviv_drm.h
> index d87410a8443a..af024d90453d 100644
> --- a/include/uapi/drm/etnaviv_drm.h
> +++ b/include/uapi/drm/etnaviv_drm.h
> @@ -77,11 +77,6 @@ struct drm_etnaviv_timespec {
> #define ETNAVIV_PARAM_GPU_PRODUCT_ID 0x1c
> #define ETNAVIV_PARAM_GPU_CUSTOMER_ID 0x1d
> #define ETNAVIV_PARAM_GPU_ECO_ID 0x1e
> -#define ETNAVIV_PARAM_GPU_NN_CORE_COUNT 0x1f
> -#define ETNAVIV_PARAM_GPU_NN_MAD_PER_CORE 0x20
> -#define ETNAVIV_PARAM_GPU_TP_CORE_COUNT 0x21
> -#define ETNAVIV_PARAM_GPU_ON_CHIP_SRAM_SIZE 0x22
> -#define ETNAVIV_PARAM_GPU_AXI_SRAM_SIZE 0x23
>
> #define ETNA_MAX_PIPES 4
>
> --
> 2.44.0
>
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