[PATCH v2 1/5] drm/etnaviv: hold GPU lock across perfmon sampling

Lucas Stach l.stach at pengutronix.de
Mon Oct 28 15:56:25 UTC 2024


Am Freitag, dem 05.07.2024 um 22:00 +0200 schrieb Lucas Stach:
> The perfmon sampling mutates shared GPU state (e.g. VIVS_HI_CLOCK_CONTROL
> to select the pipe for the perf counter reads). To avoid clashing with
> other functions mutating the same state (e.g. etnaviv_gpu_update_clock)
> the perfmon sampling needs to hold the GPU lock.
> 
> Fixes: 68dc0b295dcb ("drm/etnaviv: use 'sync points' for performance monitor requests")
> Signed-off-by: Lucas Stach <l.stach at pengutronix.de>

Series applied to etnaviv/next.

> ---
> v2: new patch
> ---
>  drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 20 ++++++++++++++------
>  1 file changed, 14 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
> index 7c7f97793ddd..2bd14d3501e2 100644
> --- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
> +++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
> @@ -1330,6 +1330,8 @@ static void sync_point_perfmon_sample_pre(struct etnaviv_gpu *gpu,
>  {
>  	u32 val;
>  
> +	mutex_lock(&gpu->lock);
> +
>  	/* disable clock gating */
>  	val = gpu_read_power(gpu, VIVS_PM_POWER_CONTROLS);
>  	val &= ~VIVS_PM_POWER_CONTROLS_ENABLE_MODULE_CLOCK_GATING;
> @@ -1341,6 +1343,8 @@ static void sync_point_perfmon_sample_pre(struct etnaviv_gpu *gpu,
>  	gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, val);
>  
>  	sync_point_perfmon_sample(gpu, event, ETNA_PM_PROCESS_PRE);
> +
> +	mutex_unlock(&gpu->lock);
>  }
>  
>  static void sync_point_perfmon_sample_post(struct etnaviv_gpu *gpu,
> @@ -1350,13 +1354,9 @@ static void sync_point_perfmon_sample_post(struct etnaviv_gpu *gpu,
>  	unsigned int i;
>  	u32 val;
>  
> -	sync_point_perfmon_sample(gpu, event, ETNA_PM_PROCESS_POST);
> -
> -	for (i = 0; i < submit->nr_pmrs; i++) {
> -		const struct etnaviv_perfmon_request *pmr = submit->pmrs + i;
> +	mutex_lock(&gpu->lock);
>  
> -		*pmr->bo_vma = pmr->sequence;
> -	}
> +	sync_point_perfmon_sample(gpu, event, ETNA_PM_PROCESS_POST);
>  
>  	/* disable debug register */
>  	val = gpu_read(gpu, VIVS_HI_CLOCK_CONTROL);
> @@ -1367,6 +1367,14 @@ static void sync_point_perfmon_sample_post(struct etnaviv_gpu *gpu,
>  	val = gpu_read_power(gpu, VIVS_PM_POWER_CONTROLS);
>  	val |= VIVS_PM_POWER_CONTROLS_ENABLE_MODULE_CLOCK_GATING;
>  	gpu_write_power(gpu, VIVS_PM_POWER_CONTROLS, val);
> +
> +	mutex_unlock(&gpu->lock);
> +
> +	for (i = 0; i < submit->nr_pmrs; i++) {
> +		const struct etnaviv_perfmon_request *pmr = submit->pmrs + i;
> +
> +		*pmr->bo_vma = pmr->sequence;
> +	}
>  }
>  
>  



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