[Freedreno] [PATCH 3/5] freedreno/ir3: add UARL support
Ilia Mirkin
imirkin at alum.mit.edu
Tue Sep 9 19:52:54 PDT 2014
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
---
src/gallium/drivers/freedreno/ir3/ir3_compiler.c | 25 ++++++++++++++++++------
1 file changed, 19 insertions(+), 6 deletions(-)
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_compiler.c b/src/gallium/drivers/freedreno/ir3/ir3_compiler.c
index 0459e92..e2cf4bb 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_compiler.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_compiler.c
@@ -1036,12 +1036,24 @@ trans_arl(const struct instr_translater *t,
*/
tmp_src = get_internal_temp(ctx, &tmp_dst);
- /* cov.f{32,16}s16 Rtmp, Rsrc */
- instr = instr_create(ctx, 1, 0);
- instr->cat1.src_type = get_ftype(ctx);
- instr->cat1.dst_type = TYPE_S16;
- add_dst_reg(ctx, instr, &tmp_dst, chan)->flags |= IR3_REG_HALF;
- add_src_reg(ctx, instr, src, chan);
+ if (t->tgsi_opc == TGSI_OPCODE_ARL) {
+ /* cov.f{32,16}s16 Rtmp, Rsrc */
+ instr = instr_create(ctx, 1, 0);
+ instr->cat1.src_type = get_ftype(ctx);
+ instr->cat1.dst_type = TYPE_S16;
+ add_dst_reg(ctx, instr, &tmp_dst, chan)->flags |= IR3_REG_HALF;
+ add_src_reg(ctx, instr, src, chan);
+ } else {
+ /* TODO: Don't do this totally unnecessary mov. But it makes
+ * the below code simpler.
+ */
+ /* mov.s16s16 Rtmp, Rsrc */
+ instr = instr_create(ctx, 1, 0);
+ instr->cat1.src_type = TYPE_S16;
+ instr->cat1.dst_type = TYPE_S16;
+ add_dst_reg(ctx, instr, &tmp_dst, chan)->flags |= IR3_REG_HALF;
+ add_src_reg(ctx, instr, src, chan)->flags |= IR3_REG_HALF;
+ }
/* shl.b Rtmp, Rtmp, 2 */
instr = instr_create(ctx, 2, OPC_SHL_B);
@@ -2062,6 +2074,7 @@ static const struct instr_translater translaters[TGSI_OPCODE_LAST] = {
INSTR(SSG, instr_cat2, .opc = OPC_SIGN_F),
INSTR(CEIL, instr_cat2, .opc = OPC_CEIL_F),
INSTR(ARL, trans_arl),
+ INSTR(UARL, trans_arl),
INSTR(EX2, instr_cat4, .opc = OPC_EXP2),
INSTR(LG2, instr_cat4, .opc = OPC_LOG2),
INSTR(ABS, instr_cat2, .opc = OPC_ABSNEG_F),
--
1.8.5.5
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