[Freedreno] [PATCH 1/3] a3xx: add point sprite replacement info

[Ilia Mirkin]

---
 rnndb/adreno/a3xx.xml | 25 ++++++++++++++++++++++++-
 1 file changed, 24 insertions(+), 1 deletion(-)

diff --git a/rnndb/adreno/a3xx.xml b/rnndb/adreno/a3xx.xml
index 586e789..e134342 100644
--- a/rnndb/adreno/a3xx.xml
+++ b/rnndb/adreno/a3xx.xml
@@ -294,6 +294,12 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd">
 	<!-- two more values?? -->
 </enum>
 
+<enum name="a3xx_repl_mode">
+	<value name="S" value="1"/>
+	<value name="T" value="2"/>
+	<value name="-T" value="3"/>
+</enum>
+
 <domain name="A3XX" width="32">
 	<!-- RBBM registers -->
 	<reg32 offset="0x0000" name="RBBM_HW_VERSION"/>
@@ -977,7 +983,24 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd">
 		</reg32>
 	</array>
 	<array offset="0x2286" name="VPC_VARYING_PS_REPL" stride="1" length="4">
-		<reg32 offset="0x0" name="MODE"/>
+		<reg32 offset="0x0" name="MODE">
+			<bitfield name="C0" low="0"  high="1"  type="a3xx_repl_mode"/>
+			<bitfield name="C1" low="2"  high="3"  type="a3xx_repl_mode"/>
+			<bitfield name="C2" low="4"  high="5"  type="a3xx_repl_mode"/>
+			<bitfield name="C3" low="6"  high="7"  type="a3xx_repl_mode"/>
+			<bitfield name="C4" low="8"  high="9"  type="a3xx_repl_mode"/>
+			<bitfield name="C5" low="10" high="11" type="a3xx_repl_mode"/>
+			<bitfield name="C6" low="12" high="13" type="a3xx_repl_mode"/>
+			<bitfield name="C7" low="14" high="15" type="a3xx_repl_mode"/>
+			<bitfield name="C8" low="16" high="17" type="a3xx_repl_mode"/>
+			<bitfield name="C9" low="18" high="19" type="a3xx_repl_mode"/>
+			<bitfield name="CA" low="20" high="21" type="a3xx_repl_mode"/>
+			<bitfield name="CB" low="22" high="23" type="a3xx_repl_mode"/>
+			<bitfield name="CC" low="24" high="25" type="a3xx_repl_mode"/>
+			<bitfield name="CD" low="26" high="27" type="a3xx_repl_mode"/>
+			<bitfield name="CE" low="28" high="29" type="a3xx_repl_mode"/>
+			<bitfield name="CF" low="30" high="31" type="a3xx_repl_mode"/>
+		</reg32>
 	</array>
 	<reg32 offset="0x228a" name="VPC_VARY_CYLWRAP_ENABLE_0"/>
 	<reg32 offset="0x228b" name="VPC_VARY_CYLWRAP_ENABLE_1"/>
-- 
2.0.5