[Freedreno] Freedreno on i.MX53
Martin Fuzzey
mfuzzey at parkeon.com
Thu Jun 25 09:29:03 PDT 2015
Hi,
I am attempting to get Freedreno running on the i.MX53
I am using upstream git versions of libdrm, mesa.
For the moment on the kernel side I have:
* hacked the 3.19 msm kernel driver to split out the parts of msm_drv.c
that are required (like the fence handling)
* included those parts in the imxdrm build (with relative paths in the
makefile for the moment - yuk)
* added a a2xx driver with initialisation functions obtained by looking
at the Freescale kgsl kernel driver code (which is different to the msm
kgsl)
* used the msm_gem functions in imxdrm
No userspace modifications, apart from accepting imxdrm and treating it
the same way as msm
[I can post patches if anyone is interested but it's very early and rough]
For the moment I'm not attempting to use the GPU MMU, just a carveout.
I then try to run the test-triangle-quad code from freedreno (modified
to use drm/kms)
This causes the GPU to hang on the second buffer submission.
Dumping the code using debugfs, running cffdump and comparing with the
scratch6 and 7 registers narrows it down this code which seems to be
generated by emit_gmem2mem_surf():
@MF@ emit_gmem2mem_surf() #3
t3 opcode: CP_SET_CONSTANT (2d) (3 dwords)
RB_COLOR_INFO: { FORMAT = COLORX_8_8_8_8 | ROUND_MODE = 0 |
ENDIAN = 0 | SWAP = 0 | BASE = 0 }
8d00ab88: c0012d00 00040001 00000005
t3 opcode: CP_SET_CONSTANT (2d) (6 dwords)
RB_COPY_CONTROL: { COPY_SAMPLE_SELECT = SAMPLE_0 |
CLEAR_MASK = 0 }
RB_COPY_DEST_BASE: 0x8d20a000
RB_COPY_DEST_PITCH: 640
RB_COPY_DEST_INFO: { DEST_ENDIAN = ENDIAN_NONE | LINEAR |
FORMAT = COLORX_8_8_8_8 | SWAP = 0 | DITHER_MODE = DITHER_DISABLE |
DITHER_TYPE = DITHER_PIXEL | WRITE_RED | WRITE_GREEN | WRITE_BLUE |
WRITE_ALPHA }
8d00ab94: c0042d00 00040318 00000000 8d20a000 00000014 0003c058
t3 opcode: CP_WAIT_FOR_IDLE (26) (2 dwords)
8d00abac: c0002600 00000000
t3 opcode: CP_SET_CONSTANT (2d) (4 dwords)
VGT_MAX_VTX_INDX: 0x3
VGT_MIN_VTX_INDX: 0
===============> @MF@ LAST OK HERE
8d00abb4: c0022d00 00040100 00000003 00000000
t0 write CP_SCRATCH_REG7
CP_SCRATCH_REG7: 17
: 00000000 00000000 00000000 00000000 00000000 00000000
00000010 00000011
8d00abc4: 0000057f 00000011
t3 opcode: CP_DRAW_INDX (22) (4 dwords)
{ VIZ_QUERY = 0 }
{ PRIM_TYPE = DI_PT_RECTLIST | SOURCE_SELECT =
DI_SRC_SEL_AUTO_INDEX | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE =
INDEX_SIZE_IGN | PRE_DRAW_INITIATOR_ENABLE | NUM_INSTANCES = 0 }
{ NUM_INDICES = 3 }
draw: 2
prim_type: DI_PT_RECTLIST (8)
source_select: DI_SRC_SEL_AUTO_INDEX (2)
num_indices: 3
current register values
! CP_SCRATCH_REG6: 16
: 00000000 00000000 00000000 00000000 00000000 00000000
00000010 00000011
! CP_SCRATCH_REG7: 17
: 00000000 00000000 00000000 00000000 00000000 00000000
00000010 00000011
SQ_INST_STORE_MANAGMENT: 0x180
TC_CNTL_STATUS: { L2_INVALIDATE }
TP0_CHICKEN: 0x2
RB_SURFACE_INFO: 224
RB_COLOR_INFO: { FORMAT = COLORX_8_8_8_8 | ROUND_MODE = 0 |
ENDIAN = 0 | SWAP = 0 | BASE = 0 }
RB_DEPTH_INFO: { DEPTH_FORMAT = DEPTHX_16 | DEPTH_BASE = 57344 }
PA_SC_SCREEN_SCISSOR_BR: { X = 192 | Y = 256 }
PA_SC_WINDOW_SCISSOR_BR: { X = 640 | Y = 480 }
! VGT_MAX_VTX_INDX: 0x3
RB_COLOR_MASK: { WRITE_RED | WRITE_GREEN | WRITE_BLUE |
WRITE_ALPHA }
RB_BLEND_ALPHA: 0xff
PA_CL_VPORT_XSCALE: 320.000000
PA_CL_VPORT_XOFFSET: 320.000000
PA_CL_VPORT_YSCALE: -240.000000
PA_CL_VPORT_YOFFSET: 240.000000
PA_CL_VPORT_ZSCALE: 0.500000
PA_CL_VPORT_ZOFFSET: 0.500000
SQ_PROGRAM_CNTL: { VS_REGS = 1 | PS_REGS = 128 | VS_RESOURCE |
PS_RESOURCE | VS_EXPORT_COUNT = 0 | VS_EXPORT_MODE = POSITION_1_VECTOR |
PS_EXPORT_MODE = 2 }
SQ_CONTEXT_MISC: { SC_SAMPLE_CNTL = CENTERS_ONLY |
PARAM_GEN_POS = 0 }
SQ_INTERPOLATOR_CNTL: 0xffffffff
RB_DEPTHCONTROL: { EARLY_Z_ENABLE | ZFUNC = FUNC_NEVER |
STENCILFUNC = FUNC_NEVER | STENCILFAIL = STENCIL_KEEP | STENCILZPASS =
STENCIL_KEEP | STENCILZFAIL = STENCIL_KEEP | STENCILFUNC_BF = FUNC_NEVER
| STENCILFAIL_BF = STENCIL_KEEP | STENCILZPASS_BF = STENCIL_KEEP |
STENCILZFAIL_BF = STENCIL_KEEP }
RB_COLORCONTROL: { ALPHA_FUNC = FUNC_NEVER | BLEND_DISABLE |
ROP_CODE = 12 | DITHER_MODE = DITHER_ALWAYS | DITHER_TYPE = DITHER_PIXEL
| ALPHA_TO_MASK_OFFSET0 = 0 | ALPHA_TO_MASK_OFFSET1 = 0 |
ALPHA_TO_MASK_OFFSET2 = 0 | ALPHA_TO_MASK_OFFSET3 = 0 }
! PA_SU_SC_MODE_CNTL: { POLYMODE = POLY_DISABLED | FRONT_PTYPE =
PC_DRAW_TRIANGLES | BACK_PTYPE = PC_DRAW_TRIANGLES | PROVOKING_VTX_LAST }
! PA_CL_VTE_CNTL: { VPORT_X_SCALE_ENA | VPORT_X_OFFSET_ENA |
VPORT_Y_SCALE_ENA | VPORT_Y_OFFSET_ENA | VTX_W0_FMT }
! RB_MODECONTROL: { EDRAM_MODE = EDRAM_COPY }
RB_SAMPLE_POS: 0x88888888
CLEAR_COLOR: { RED = 0x50 | GREEN = 0x50 | BLUE = 0x50 | ALPHA
= 0xff }
PA_SU_POINT_SIZE: { HEIGHT = 0.500000 | WIDTH = 0.500000 }
PA_SU_LINE_CNTL: { WIDTH = 0.500000 }
PA_SU_VTX_CNTL: { PIX_CENTER = PIXCENTER_OGL | ROUND_MODE =
TRUNCATE | QUANT_MODE = ONE_SIXTEENTH }
PA_CL_GB_VERT_CLIP_ADJ: 1.000000
PA_CL_GB_VERT_DISC_ADJ: 1.000000
PA_CL_GB_HORZ_CLIP_ADJ: 1.000000
PA_CL_GB_HORZ_DISC_ADJ: 1.000000
SQ_VS_CONST: { BASE = 32 | SIZE = 256 }
SQ_PS_CONST: { BASE = 288 | SIZE = 224 }
PA_SC_AA_MASK: 0xffff
! VGT_VERTEX_REUSE_BLOCK_CNTL: 0x28f
RB_COPY_DEST_BASE: 0x8d20a000
RB_COPY_DEST_PITCH: 640
RB_COPY_DEST_INFO: { DEST_ENDIAN = ENDIAN_NONE | LINEAR |
FORMAT = COLORX_8_8_8_8 | SWAP = 0 | DITHER_MODE = DITHER_DISABLE |
DITHER_TYPE = DITHER_PIXEL | WRITE_RED | WRITE_GREEN | WRITE_BLUE |
WRITE_ALPHA }
! RB_COPY_DEST_OFFSET: { X = 448 | Y = 0 }
RB_COLOR_DEST_MASK: 0xffffffff
8d00abcc: c0022200 00000000 00004088 00000003
==================> @MF@ HANG BEFORE HERE
t0 write CP_SCRATCH_REG7
NEEDS WFI: CP_SCRATCH_REG7 (57f)
CP_SCRATCH_REG7: 18
: 00000000 00000000 00000000 00000000 00000000 00000000
00000010 00000012
However this is the third time code generated by emit_gmem2mem_surf() is
run in the command stream, the first two times don't hang.
Any ideas what could be going wrong or a good strategy to debug this?
I probably don't really know enough about GPUs...
Any hints appreciated.
Cheers,
Martin
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