[Freedreno] [PATCH 1/4] drm/msm: remove qcom, gpu-pwrlevels bindings
Jordan Crouse
jcrouse at codeaurora.org
Wed Feb 1 23:26:44 UTC 2017
On Mon, Jan 30, 2017 at 01:35:47PM -0500, Rob Clark wrote:
> On Mon, Jan 30, 2017 at 1:21 PM, Eric Anholt <eric at anholt.net> wrote:
> > Rob Clark <robdclark at gmail.com> writes:
> >
> >> The plan is to use the OPP bindings. For now, remove the documentation
> >> for qcom,gpu-pwrlevels, and make the driver fall back to a safe low
> >> clock if the node is not present.
> >>
> >> Note that no upstream dtb use this node. For now we keep compatibility
> >> with this node to avoid breaking compatibility with downstream android
> >> dt files.
> >>
> >> Signed-off-by: Rob Clark <robdclark at gmail.com>
> >
> > Will we need the bus frequency knobs that I see in the old pwrlevels
> > node? If so, what would the plan be for doing that within OPP?
>
> So, that I think is one of the open questions. Jordan knows this
> stuff a lot better than I, but my understanding is that bus and clk
> scale *basically* independently, except that a given gpu clk we want a
> different minimum bus clk.
>
> (I'm not sure if that is a functional requirement, or just what qcom
> arrived at after performance tuning..)
>
> There is some work ongoing to get some sort of upstream bus scaling
> scaling, although I'm not really sure yet what the bindings for this
> would look like.
>
> So basically short answer is "I don't know.. there are too many open
> questions". Maybe in the end we re-introduce qcom,gpu-pwrlevels. But
> I think for now the approach of not documenting it and have safe/slow
> clk fallback in the driver is a reasonable way to move forward with
> getting some basic gpu nodes into upstream dts files.
Rob has it right. On a fully optimized platform the bus does scale
independently from the GPU but when we switch GPU levels up we need to
immediately kick the bus to a new baseline level otherwise it underruns.
Eventually somebody will have to figure out how to make OPP work with both
device and bus frequency. Perhaps that will happen by the time useful bus
scaling hits the kernel, otherwise we will have to suffer along with two tables
and a closer relationship between the GPU driver and the devfreq governor than
any of us are comfortable with. Luckily for this discussion that someday is in
the future and we can focus on doing the frqeuency right.
Jordan
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